IRF9520 Vishay, IRF9520 Datasheet - Page 7

MOSFET P-CH 100V 6.8A TO-220AB

IRF9520

Manufacturer Part Number
IRF9520
Description
MOSFET P-CH 100V 6.8A TO-220AB
Manufacturer
Vishay
Datasheets

Specifications of IRF9520

Fet Type
MOSFET P-Channel, Metal Oxide
Fet Feature
Standard
Rds On (max) @ Id, Vgs
600 mOhm @ 4.1A, 10V
Drain To Source Voltage (vdss)
100V
Current - Continuous Drain (id) @ 25° C
6.8A
Vgs(th) (max) @ Id
4V @ 250µA
Gate Charge (qg) @ Vgs
18nC @ 10V
Input Capacitance (ciss) @ Vds
390pF @ 25V
Power - Max
60W
Mounting Type
Through Hole
Package / Case
TO-220-3 (Straight Leads)
Configuration
Single
Transistor Polarity
P-Channel
Resistance Drain-source Rds (on)
0.6 Ohms
Drain-source Breakdown Voltage
- 100 V
Gate-source Breakdown Voltage
+/- 20 V
Continuous Drain Current
6.8 A
Power Dissipation
60 W
Maximum Operating Temperature
+ 175 C
Mounting Style
Through Hole
Minimum Operating Temperature
- 55 C
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
*IRF9520

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Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?91074.
Document Number: 91074
S11-0512-Rev. B, 21-Mar-11
THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
Re-applied
voltage
Reverse
recovery
current
+
R
-
g
D.U.T.
• Compliment N-Channel of D.U.T. for driver
Note
a. V
Note
Driver gate drive
D.U.T. l
D.U.T. V
Inductor current
GS
= - 5 V for logic level and - 3 V drive devices
P.W.
SD
DS
waveform
This datasheet is subject to change without notice.
waveform
Peak Diode Recovery dV/dt Test Circuit
Body diode forward drop
Ripple ≤ 5 %
Period
Body diode forward
+
-
Fig. 14 - For P-Channel
• I
• dV/dt controlled by R
• D.U.T. - device under test
current
Diode recovery
SD
controlled by duty factor “D”
Circuit layout considerations
• Low stray inductance
• Ground plane
• Low leakage inductance
dV/dt
current transformer
dI/dt
D =
-
g
Period
P.W.
+
I
V
SD
V
GS
DD
= - 10 V
+
-
IRF9520, SiHF9520
V
DD
a
www.vishay.com/doc?91000
Vishay Siliconix
www.vishay.com
7

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