ZL30106QDG Zarlink, ZL30106QDG Datasheet - Page 26

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ZL30106QDG

Manufacturer Part Number
ZL30106QDG
Description
SONET/SDH/PDH Network Interface 64-Pin TQFP
Manufacturer
Zarlink
Datasheet

Specifications of ZL30106QDG

Package
64TQFP
Power Supply Type
Analog
Typical Supply Current
68(Max) mA
Typical Operating Supply Voltage
1.8|3.3 V
Minimum Operating Supply Voltage
1.62 V
Maximum Operating Supply Voltage
3.63 V

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In the automatic mode of operation, both pins REF_SEL1 and REF_SEL0 are configured as outputs. The logic level
on the REF_SEL0 output indicates the current input reference being selected for synchronization (see Table 6).
The mode selection state machine behaves differently in Automatic mode in that when both reference REF0 and
reference REF1 are out of range (REF_OOR=1), the state machine will select the Holdover state. In Normal mode
the reference out of range (REF_OOR) status is ignored by the state machine. This is illustrated in Figure 15.
4.5.2.1
When the currently-active input reference in Automatic mode fails in a coarse manner, the REF_DIS internal signal
places the device in holdover, with the HOLDOVER pin and the REF_FAIL pin asserted. This can occur through
triggering the Single Cycle Monitor, or the Coarse Frequency Monitor, in the Reference Monitor block. If the
reference does not correct itself within the reference-disqualify duration (50 milliseconds) the HOLDOVER pin is de-
asserted and the REF_SEL outputs indicate that the device has switched to the other reference. Where the new
reference is close enough in frequency and TIE-corrected phase for the output to stay within the phase-lock-
window, the LOCK output will remain asserted through the reference-switch process. Where the new reference has
enough frequency offset and/or TIE-corrected phase offset to force the output outside the phase-lock-window, the
LOCK output will de-assert, the lock-qualify timer is reset, and LOCK will stay de-asserted for the full lock-time
duration. Figure 16 illustrates this process.
If the reference corrects itself within the reference-disqualify duration (< 50 milliseconds) the HOLDOVER pin is de-
asserted, the REF_FAIL pin is de-asserted, and the REF_SEL outputs indicate that the device has remained locked
to the old reference. The LOCK pin remains asserted.
REF_DIS=1: Current selected reference disrupted (see Figure 3). REF_DIS is an internal signal.
REF_OOR=1: Current selected reference out of range (see Figure 3). REF_OOR is an internal signal.
REF_CH= 1: Reference change, a transition in the reference selection (see Figure 14). REF_CH is an internal signal.
Automatic Reference Switching - Coarse Reference Failure
REF_SEL1
(output pin)
RST
Table 6 - The Reference Selection Pins in the Automatic Mode
REF_DIS=0 and REF_OOR=0
and REF_CH=0 and HMS=0
0
0
(HOLDOVER=1)
Figure 15 - Mode Switching in Automatic Mode
Holdover
REF_SEL0
(output pin)
(REF_DIS=0 and REF_OOR=0 and HMS=1)
or REF_CH=1
Zarlink Semiconductor Inc.
0
1
ZL30106
REF_DIS=1
or REF_OOR=1
(HOLDOVER=0)
26
Normal
Input Reference
REF_CH=1
REF0
REF1
(HOLDOVER=1)
REF_DIS=0
and REF_OOR=0
TIE Correction
Data Sheet

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