MT48LC2M32B2TG-7 IT:G TR Micron Technology Inc, MT48LC2M32B2TG-7 IT:G TR Datasheet - Page 51
![DRAM Chip SDRAM 64M-Bit 2Mx32 3.3V 86-Pin TSOP-II T/R](/photos/7/22/72264/557-86-tsop_sml.jpg)
MT48LC2M32B2TG-7 IT:G TR
Manufacturer Part Number
MT48LC2M32B2TG-7 IT:G TR
Description
DRAM Chip SDRAM 64M-Bit 2Mx32 3.3V 86-Pin TSOP-II T/R
Manufacturer
Micron Technology Inc
Type
SDRAMr
Datasheet
1.MT48LC2M32B2P-6G_TR.pdf
(69 pages)
Specifications of MT48LC2M32B2TG-7 IT:G TR
Package
86TSOP-II
Density
64 Mb
Address Bus Width
13 Bit
Operating Supply Voltage
3.3 V
Maximum Clock Rate
143 MHz
Maximum Random Access Time
17|8|5.5 ns
Operating Temperature
-40 to 85 °C
Format - Memory
RAM
Memory Type
SDRAM
Memory Size
64M (2Mx32)
Speed
143MHz
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Package / Case
86-TSOP
Organization
2Mx32
Address Bus
13b
Access Time (max)
17/8/5.5ns
Operating Supply Voltage (typ)
3.3V
Package Type
TSOP-II
Operating Temp Range
-40C to 85C
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Supply Current
160mA
Pin Count
86
Mounting
Surface Mount
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
557-1075-2
Timing Diagrams
Figure 33:
PDF: 09005aef811ce1fe/Source: 09005aef811ce1d5
64MSDRAMx32_2.fm - Rev. J 12/08 EN
COMMAND
DQM 0–3
BA0, BA1
A0–A9
CKE
A10
CLK
DQ
T = 100µs
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Power-up:
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CK stable
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DD
Initialize and Load Mode Register
and
t CKS
t CMS
T0
Notes:
NOP
t CKH
t CMH
High-Z
SINGLE BANK
t CMS
ALL BANKS
t CK
1. The mode register may be loaded prior to the AUTO REFRESH cycles if desired.
2. Outputs are guaranteed High-Z after command is issued.
PRECHARGE
BANKS
T1
ALL
t CMH
t RP
Precharge
all banks
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t CMS
Tn + 1
REFRESH
AUTO
t CMH
t CH
AUTO REFRESH
t RFC
NOP
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NOP
51
t CL
To + 1
REFRESH
AUTO
AUTO REFRESH
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t RFC
NOP
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NOP
t AS
t AS
t AS
LOAD MODE
Tp + 1
REGISTER
CODE
CODE
CODE
t AH
t AH
t AH
Program Mode Register
©2001 Micron Technology, Inc. All rights reserved.
64Mb: x32 SDRAM
t MRD
Tp + 2
Timing Diagrams
NOP
1, 2
Tp + 3
ACTIVE
BANK
ROW
ROW
DON’T CARE
UNDEFINED