LCMXO1200C-3TN144C LATTICE SEMICONDUCTOR, LCMXO1200C-3TN144C Datasheet - Page 20

• Manufacturer Part Number: LCMXO1200C-3TN144C
• Description: CPLD MachXO Family 600 Macro Cells 1.8V/2.5V/3.3V 144-Pin TQFP Tray
• Manufacturer: LATTICE SEMICONDUCTOR

Specifications of LCMXO1200C-3TN144C

• Package: 144TQFP
• Family Name: MachXO
• Number Of Macro Cells: 600
• Maximum Propagation Delay Time: 5.1 ns
• Number Of User I/os: 113
• Typical Operating Supply Voltage: 1.8|2.5|3.3 V
• Ram Bits: 9420.8
• Memory Type: SRAM
• Operating Temperature: 0 to 85 °C

Lattice Semiconductor
Table 2-8. I/O Support Device by Device
Table 2-9. Supported Input Standards
Number of I/O Banks
Type of Input Buffers
Types of Output Buffers
Differential Output 
Emulation Capability
PCI Support
Single Ended Interfaces
LVTTL
LVCMOS33
LVCMOS25
LVCMOS18
LVCMOS15
LVCMOS12
PCI
Differential Interfaces
BLVDS
1. Top Banks of MachXO1200 and MachXO2280 devices only.
2. MachXO1200 and MachXO2280 devices only.
2
Single-ended 
(all I/O Banks)
Single-ended buffers
with complementary
outputs (all I/O Banks)
All I/O Banks
No
1
2
MachXO256
, LVDS
Input Standard
2
, LVPECL
2
, RSDS
4
Single-ended 
(all I/O Banks)
Single-ended buffers
with complementary
outputs (all I/O Banks)
All I/O Banks
No
MachXO640
2
2-17
3.3V
Yes
Yes
Yes
Yes
Yes
Yes
2.5V
Yes
Yes
Yes
Yes
Yes
VCCIO (Typ.)
8
Single-ended 
(all I/O Banks)
Differential Receivers
(all I/O Banks)
Single-ended buffers
with complementary
outputs (all I/O Banks)
Differential buffers with
true LVDS outputs (50%
on left and right side)
All I/O Banks
Top side only
1.8V
Yes
Yes
Yes
Yes
Yes
Yes
MachXO1200
MachXO Family Data Sheet
1.5V
Yes
Yes
Yes
Yes
Yes
Yes
1.2V
Yes
Yes
Yes
Yes
Yes
8
Single-ended 
(all I/O Banks)
Differential Receivers
(all I/O Banks)
Single-ended buffers
with complementary
outputs (all I/O Banks)
Differential buffers with
true LVDS outputs (50%
on left and right side)
Top side only
All I/O Banks
MachXO2280
Architecture