LCMXO1200C-3TN144C LATTICE SEMICONDUCTOR, LCMXO1200C-3TN144C Datasheet - Page 32

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LCMXO1200C-3TN144C

Manufacturer Part Number
LCMXO1200C-3TN144C
Description
CPLD MachXO Family 600 Macro Cells 1.8V/2.5V/3.3V 144-Pin TQFP Tray
Manufacturer
LATTICE SEMICONDUCTOR
Datasheet

Specifications of LCMXO1200C-3TN144C

Package
144TQFP
Family Name
MachXO
Number Of Macro Cells
600
Maximum Propagation Delay Time
5.1 ns
Number Of User I/os
113
Typical Operating Supply Voltage
1.8|2.5|3.3 V
Ram Bits
9420.8
Memory Type
SRAM
Operating Temperature
0 to 85 °C

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Lattice Semiconductor
sysIO Recommended Operating Conditions
LVCMOS 3.3
LVCMOS 2.5
LVCMOS 1.8
LVCMOS 1.5
LVCMOS 1.2
LVTTL
PCI
LVDS
LVPECL
BLVDS
RSDS
1. Inputs on chip. Outputs are implemented with the addition of external resistors.
2. MachXO1200 and MachXO2280 devices have dedicated LVDS buffers
3. Input on the top bank of the MachXO1200 and MachXO2280 only.
3
Standard
1, 2
1
1
1
3.135
2.375
1.425
3.135
3.135
2.375
3.135
2.375
2.375
Min.
1.71
1.14
3-6
V
CCIO
Typ.
3.3
2.5
1.8
1.5
1.2
3.3
3.3
2.5
3.3
2.5
2.5
(V)
DC and Switching Characteristics
MachXO Family Data Sheet
3.465
2.625
1.575
3.465
3.465
2.625
3.465
2.625
2.625
Max.
1.89
1.26

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