M4A3-256/128-10YC LATTICE SEMICONDUCTOR, M4A3-256/128-10YC Datasheet - Page 18

• Manufacturer Part Number: M4A3-256/128-10YC
• Description: CPLD ispMACH™ 4A Family 10K Gates 256 Macro Cells 83.3MHz/118MHz EECMOS Technology 3.3V 208-Pin PQFP Tray
• Manufacturer: LATTICE SEMICONDUCTOR

Specifications of M4A3-256/128-10YC

• Package: 208PQFP
• Family Name: ispMACH™ 4A
• Device System Gates: 10000
• Number Of Macro Cells: 256
• Maximum Propagation Delay Time: 10 ns
• Number Of User I/os: 128
• Typical Operating Supply Voltage: 3.3 V
• Maximum Operating Frequency: 83.3|118 MHz
• Number Of Product Terms Per Macro: 20
• Operating Temperature: 0 to 70 °C

Input Switch Matrix
The input switch matrix (Figures 12 and 13) optimizes routing of inputs to the central switch matrix.
Without the input switch matrix, each input and feedback signal has only one way to enter the central switch
matrix. The input switch matrix provides additional ways for these signals to enter the central switch matrix.
From Input Cell
17466G-002
17466G-003
Figure 12. ispMACH 4A with 2:1 Macrocell-I/O Cell
Figure 13. ispMACH 4A with 1:1 Macrocell-I/O Cell
Ratio - Input Switch Matrix
Ratio - Input Switch Matrix
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ispMACH 4A Family