XC2C64A-7CPG56I Xilinx Inc, XC2C64A-7CPG56I Datasheet - Page 3

• Manufacturer Part Number: XC2C64A-7CPG56I
• Description: CPLD CoolRunner™-II Family 1.5K Gates 64 Macro Cells 159MHz 0.18um (CMOS) Technology 1.8V 56-Pin CSBGA
• Manufacturer: Xilinx Inc
• Series: CoolRunner IIr

Specifications of XC2C64A-7CPG56I

• Package: 56CSBGA
• Family Name: CoolRunner™-II
• Device System Gates: 1500
• Number Of Macro Cells: 64
• Maximum Propagation Delay Time: 7.5 ns
• Number Of User I/os: 45
• Number Of Logic Blocks/elements: 4
• Typical Operating Supply Voltage: 1.8 V
• Maximum Operating Frequency: 159 MHz
• Number Of Product Terms Per Macro: 40
• Operating Temperature: -40 to 85 °C
• Features: Programmable
• Package / Case: 56-CSBGA
• Mounting Type: Surface Mount
• Voltage: 1.8V
• Number Of I /o: 45
• Memory Type: CMOS
• Programmable Type: In System Programmable
• Number Of Macrocells: 64
• Delay Time Tpd(1) Max: 6.7ns
• Voltage Supply - Internal: 1.7 V ~ 1.9 V
• Number Of Logic Elements/blocks: 4
• Number Of Gates: 1500
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Logic Elements/cells: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With: 122-1536 - KIT STARTER SPARTAN-3E122-1532 - KIT DEVELOPMENT SPARTAN 3ADSP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Absolute Maximum Ratings
Recommended Operating Conditions
DC Electrical Characteristics Over Recommended Operating Conditions
DS311 (v2.3) November 19, 2008
Product Specification
Notes:
1.
2.
3.
Notes:
1.
2.
I
I
I
C
C
C
I
I
CCSB
CCSB
CC
IL
IH
Symbol
JTAG
CLK
IO
(2)
(2)
Symbol
V
(1)
Maximum DC undershoot below GND must be limited to either 0.5V or 10 mA, whichever is easiest to achieve. During transitions,
the device pins might undershoot to –2.0V or overshoot to +4.5V, provided this overshoot or undershoot lasts less than 10 ns and
with the forcing current being limited to 200 mA.
Valid over commercial temperature range.
For soldering guidelines and thermal considerations, see the
packages, see XAPP427.
16-bit up/down, Resetable binary counter (one counter per function block) tested at
See Quality and Reliability section of the CoolRunner-II family data sheet.
Symbol
V
V
V
V
CCAUX
V
V
V
V
JTAG
CCIO
CCAUX
STG
V
CC
CCIO
TS
IN
T
CC
J
(1)
(1)
(3)
(2)
R
Standby current Commercial
Standby current Industrial
Dynamic current
JTAG input capacitance
Global clock input capacitance
I/O capacitance
Input leakage current
I/O High-Z leakage
Supply voltage for internal logic
and input buffers
Supply voltage for output drivers @ 3.3V operation
Supply voltage for output drivers @ 2.5V operation
Supply voltage for output drivers @ 1.8V operation
Supply voltage for output drivers @ 1.5V operation
JTAG programming pins
Supply voltage relative to ground
Supply voltage for output drivers
JTAG input voltage limits
JTAG input supply voltage
Input voltage relative to ground
Voltage applied to 3-state output
Storage Temperature (ambient)
Junction Temperature
Parameter
Description
Parameter
V
V
(1)
IN
IN
V
V
(1)
= 0V or V
= 0V or V
CC
CC
www.xilinx.com
Commercial T
Industrial T
Test Conditions
= 1.9V, V
= 1.9V, V
f = 50 MHz
Device Packaging
f = 1 MHz
f = 1 MHz
f = 1 MHz
f = 1 MHz
CCIO
CCIO
A
CCIO
CCIO
= –40°C to +85°C
to 3.9V
to 3.9V
A
= 0°C to +70°C
= 3.6V
= 3.6V
information on the Xilinx website. For Pb free
V
CC
=V
Typical
31
43
CCIO
-
-
-
-
-
-
-
XC2C64A CoolRunner-II CPLD
–65 to +150
Min
= 1.9V.
–0.5 to 2.0
–0.5 to 4.0
–0.5 to 4.0
–0.5 to 4.0
–0.5 to 4.0
–0.5 to 4.0
1.7
1.7
3.0
2.3
1.7
1.4
1.7
Value
+150
Max.
+/–1
+/–1
100
165
500
10
12
10
5
Max
1.9
1.9
3.6
2.7
1.9
1.6
3.6
Units
Units
Units
mA
°C
°C
μA
μA
μA
pF
pF
pF
μA
μA
V
V
V
V
V
V
V
V
V
V
V
V
V
3