XC3S500E-4PQG208C Xilinx Inc, XC3S500E-4PQG208C Datasheet - Page 108

• Manufacturer Part Number: XC3S500E-4PQG208C
• Description: FPGA Spartan®-3E Family 500K Gates 10476 Cells 572MHz 90nm (CMOS) Technology 1.2V 208-Pin PQFP
• Manufacturer: Xilinx Inc
• Series: Spartan™-3Er

Specifications of XC3S500E-4PQG208C

• Package: 208PQFP
• Family Name: Spartan®-3E
• Device Logic Cells: 10476
• Device Logic Units: 1164
• Device System Gates: 500000
• Number Of Registers: 9312
• Maximum Internal Frequency: 572 MHz
• Typical Operating Supply Voltage: 1.2 V
• Maximum Number Of User I/os: 158
• Ram Bits: 368640
• Number Of Logic Elements/cells: 10476
• Number Of Labs/clbs: 1164
• Total Ram Bits: 368640
• Number Of I /o: 158
• Number Of Gates: 500000
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 208-BFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 122-1536 - KIT STARTER SPARTAN-3E
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 122-1520

Functional Description
Readback
FPGA configuration data can be read back using either the
Slave Parallel or JTAG mode. This function is disabled if the
Bitstream Generator
or Level2.
Along with the configuration data, it is possible to read back
the contents of all registers and distributed RAM.
To synchronously control when register values are captured
for readback, use the CAPTURE_SPARTAN3 library primi-
tive, which applies for both Spartan-3 and Spartan-3E
FPGA families.
The Readback feature is available in most Spartan-3E
FPGA product options, as indicated in
back feature is not available in the XC3S1200E and
XC3S1600E FPGAs when using the -4 speed grade in the
Commercial temperature grade. Similarly, block RAM Read-
back support is not available in the -4 speed grade, Com-
mercial temperature devices. If Readback is required in an
XC3S1200E or XC3S1600E FPGA, or if block RAM Read-
back is required on any Spartan-3E FPGA, upgrade to
either the Industrial temperature grade version or the -5
speed grade.
108
Security
option is set to either Level1
Table
68. The Read-
www.xilinx.com
The Xilinx iMPACT programming software uses the Read-
back feature for its optional Verify and Readback opera-
tions. The Xilinx ChipScope™ software presently does not
use Readback but may in future updates.
Table 68: Readback Support in Spartan-3E FPGAs
Block RAM Readback
General Readback (registers, distributed RAM)
Temperature Range
All Spartan-3E
Speed Grade
XC3S1200E
XC3S1600E
XC3S100E
XC3S250E
XC3S500E
FPGAs
Yes
Yes
Yes
No
No
No
-4
Commercial
DS312-2 (v3.8) August 26, 2009
Product Specification
Yes
Yes
Yes
Yes
Yes
Yes
-5
Industrial
Yes
Yes
Yes
Yes
Yes
Yes
-4
R