XC3SD3400A-4CSG484C Xilinx Inc, XC3SD3400A-4CSG484C Datasheet - Page 27

• Manufacturer Part Number: XC3SD3400A-4CSG484C
• Description: FPGA Spartan®-3A Family 3.4M Gates 53712 Cells 667MHz 90nm Technology 1.2V 484-Pin LCSBGA
• Manufacturer: Xilinx Inc
• Series: Spartan™-3A DSPr

Specifications of XC3SD3400A-4CSG484C

• Package: 484LCSBGA
• Family Name: Spartan®-3A
• Device Logic Units: 53712
• Device System Gates: 3400000
• Maximum Internal Frequency: 667 MHz
• Typical Operating Supply Voltage: 1.2 V
• Maximum Number Of User I/os: 309
• Ram Bits: 2322432
• Number Of Logic Elements/cells: 53712
• Number Of Labs/clbs: 5968
• Total Ram Bits: 2322432
• Number Of I /o: 309
• Number Of Gates: 3400000
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 484-FBGA, CSPBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 122-1532 - KIT DEVELOPMENT SPARTAN 3ADSP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 122-1540

Output Propagation Times
Table 23: Timing for the IOB Output Path
DS610 (v3.0) October 4, 2010
Product Specification
Notes:
1.
2.
Clock-to-Output Times
Propagation Times
Set/Reset Times
T
Symbol
The numbers in this table are tested using the methodology presented in
Table 7
This time requires adjustment whenever a signal standard other than LVCMOS25 with 12 mA drive and Fast slew rate is assigned to the data
Output. When this is true, add the appropriate Output adjustment from
T
T
T
IOGSRQ
IOCKP
IOSRP
IOOP
and
Table
When reading from the Output
Flip-Flop (OFF), the time from the
active transition at the OCLK input to
data appearing at the Output pin
The time it takes for data to travel from
the IOB’s O input to the Output pin
Time from asserting the OFF’s SR
input to setting/resetting data at the
Output pin
Time from asserting the Global Set
Reset (GSR) input on the
STARTUP_SPARTAN3A primitive to
setting/resetting data at the Output pin
10.
Description
LVCMOS25
drive, Fast slew rate
LVCMOS25
drive, Fast slew rate
LVCMOS25
drive, Fast slew rate
Spartan-3A DSP FPGA Family: DC and Switching Characteristics
www.xilinx.com
Conditions
(2)
(2)
(2)
Table
, 12 mA output
, 12 mA output
, 12 mA output
Table 26
25.
and are based on the operating conditions set forth in
Device
All
All
All
Max
2.87
2.78
3.63
8.62
Speed Grade
-5
Max
3.13
2.91
3.89
9.65
-4
Units
ns
ns
ns
ns
27