XC5VLX220-1FF1760I Xilinx Inc, XC5VLX220-1FF1760I Datasheet - Page 239
XC5VLX220-1FF1760I
Manufacturer Part Number
XC5VLX220-1FF1760I
Description
FPGA Virtex®-5 Family 221184 Cells 65nm (CMOS) Technology 1V 1760-Pin FCBGA
Manufacturer
Xilinx Inc
Series
Virtex™-5 LXr
Datasheets
1.XC5VLX30-1FFG324C.pdf
(91 pages)
2.XC5VLX30-1FFG324C.pdf
(13 pages)
3.XC5VLX30-1FFG324C.pdf
(385 pages)
Specifications of XC5VLX220-1FF1760I
Package
1760FCBGA
Family Name
Virtex®-5
Device Logic Units
221184
Typical Operating Supply Voltage
1 V
Maximum Number Of User I/os
800
Ram Bits
7077888
Number Of Logic Elements/cells
221184
Number Of Labs/clbs
17280
Total Ram Bits
7077888
Number Of I /o
800
Voltage - Supply
0.95 V ~ 1.05 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
1760-BBGA, FCBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With
HW-AFX-FF1760-500-G - BOARD DEV VIRTEX 5 FF1760
Number Of Gates
-
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XC5VLX220-1FF1760I
Manufacturer:
Xilinx Inc
Quantity:
10 000
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Specific Guidelines for I/O Supported Standards
Virtex-5 FPGA User Guide
UG190 (v5.3) May 17, 2010
LVTTL (Low Voltage Transistor-Transistor Logic)
The following subsections provide an overview of the I/O standards supported by all
Virtex-5 devices.
While most Virtex-5 FPGA I/O supported standards specify a range of allowed voltages,
this chapter records typical voltage values only. Detailed information on each specification
can be found on the Electronic Industry Alliance JEDEC web site at
The low-voltage TTL (LVTTL) standard is a general purpose EIA/JESDSA standard for
3.3V applications using an LVTTL input buffer and a push-pull output buffer. This
standard requires a 3.3V input and output supply voltage (V
use of a reference voltage (V
Sample circuits illustrating both unidirectional and bidirectional LVTTL termination
techniques are shown in
X-Ref Target - Figure 6-27
LVTTL
LVTTL
LVTTL
Figure 6-27: LVTTL Unidirectional Termination
IOB
IOB
IOB
Note: V
Figure 6-27
www.xilinx.com
REF
TT
R S = Z 0 – R D
is any voltage from 0V to V CCO
) or a termination voltage (V
R P = Z 0
Z 0
Z 0
and
Specific Guidelines for I/O Supported Standards
Z 0
V
Figure
TT
6-28.
IOB
IOB
IOB
LVTTL
LVTTL
LVTTL
CCO
TT
).
), but does not require the
http://www.jedec.org.
ug190_6_24_022806
239
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