XC6VCX75T-2FF484C Xilinx Inc, XC6VCX75T-2FF484C Datasheet - Page 41

• Manufacturer Part Number: XC6VCX75T-2FF484C
• Description: FPGA Virtex®-6 CXT Family 74496 Cells 40nm (CMOS) Technology 1V 484-Pin FCBGA
• Manufacturer: Xilinx Inc

Specifications of XC6VCX75T-2FF484C

• Package: 484FCBGA
• Family Name: Virtex®-6 CXT
• Device Logic Units: 74496
• Number Of Registers: 93120
• Typical Operating Supply Voltage: 1 V
• Maximum Number Of User I/os: 240
• Ram Bits: 5750784

Table 51: DSP48E1 Switching Characteristics (Cont’d)
DS153 (v1.6) February 11, 2011
Product Specification
Clock to Outs from Input Register Clock to Cascading Output Pins
T
T
MULTSIGNOUT}_{AREG, BREG}_MULT
T
MULTSIGNOUT}_{AREG, BREG}
T
MULTSIGNOUT}_DREG_MULT
T
MULTSIGNOUT}_CREG
Maximum Frequency
F
F
F
F
F
F
F
F
DSPCKO_{ACOUT; BCOUT}_{AREG; BREG}
DSPCKO_{PCOUT, CARRYCASCOUT,
DSPCKO_{PCOUT, CARRYCASCOUT,
DSPCKO_{PCOUT, CARRYCASCOUT,
DSPCKO_{PCOUT, CARRYCASCOUT,
MAX
MAX_PATDET
MAX_MULT_NOMREG
MAX_MULT_NOMREG_PATDET
MAX_PREADD_MULT_NOADREG
MAX_PREADD_MULT_NOADREG_PATDET
MAX_NOPIPELINEREG
MAX_NOPIPELINEREG_PATDET
Symbol
CLK (AREG, BREG) to {P, CARRYOUT} output
CLK (AREG, BREG) to {PCOUT,
CARRYCASCOUT, MULTSIGNOUT} output
using multiplier
CLK (AREG, BREG) to {PCOUT,
CARRYCASCOUT, MULTSIGNOUT} output not
using multiplier
CLK (DREG) to {PCOUT, CARRYCASCOUT,
MULTSIGNOUT} output using multiplier
CLK (CREG) to {PCOUT, CARRYCASCOUT,
MULTSIGNOUT} output
With all registers used
With pattern detector
Two register multiply without MREG
Two register multiply without MREG with pattern
detect
Without ADREG
Without ADREG with pattern detect
Without pipeline registers (MREG, ADREG)
Without pipeline registers (MREG, ADREG)
with pattern detect
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Description
Virtex-6 CXT Family Data Sheet
0.89
5.49
2.40
5.38
2.40
350
350
262
241
292
292
196
184
-2
Speed Grade
1.02
6.31
2.76
6.18
2.76
275
275
227
209
253
253
170
160
-1
Units
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
ns
ns
ns
ns
ns
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