M5275EVBE Freescale, M5275EVBE Datasheet - Page 35

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M5275EVBE

Manufacturer Part Number
M5275EVBE
Description
Manufacturer
Freescale
Datasheet

Specifications of M5275EVBE

Lead Free Status / RoHS Status
Compliant
Figure 17
8.11.3
Table 20
Figure 18
Freescale Semiconductor
Num
Num
M5
M6
M7
M8
M9
lists MII asynchronous inputs signal timing.
shows MII transmit signal timings listed in
shows MII asynchronous input timings listed in
FECn_TXD[3:0] (outputs)
FECn_TXEN
FECn_TXER
MII Async Inputs Signal Timing (FECn_CRS and FECn_COL)
FECn_CRS, FECn_COL minimum pulse width
FECn_TXCLK to FECn_TXD[3:0], FECn_TXEN, FECn_TXER
invalid
FECn_TXCLK to FECn_TXD[3:0], FECn_TXEN, FECn_TXER
valid
FECn_TXCLK pulse width high
FECn_TXCLK pulse width low
FECn_TXCLK (input)
MCF5275 Integrated Microprocessor Family Hardware Specification, Rev. 4
FECn_CRS
FECn_COL
Table 20. MII Asynchronous Input Signal Timing
Figure 17. MII Transmit Signal Timing Diagram
Figure 18. MII Async Inputs Timing Diagram
Characteristic
Characteristic
Table 19. MII Transmit Channel Timing
M5
M6
M7
Table
M9
Table
19.
20.
M8
35%
35%
Min
Min
1.5
5
Max
65%
65%
Max
25
Electrical Characteristics
FECn_TXCLK period
FECn_TXCLK period
FECn_TXCLK period
Unit
Unit
ns
ns
35