SCANSTAEVK/NOPB National Semiconductor, SCANSTAEVK/NOPB Datasheet - Page 17

• Manufacturer Part Number: SCANSTAEVK/NOPB
• Manufacturer: National Semiconductor

Specifications of SCANSTAEVK/NOPB

• Lead Free Status / RoHS Status: Compliant

Mode Register(s)
MR0: X000X001
MR0: X000X010
MR0: X000X011
MR0: X000X100
MR0: X000X101
MR0: X000X110
MR0: X000X111
MR0: X010X000
MR0: X010X001
MR0: X010X010
MR0: X010X011
MR0: X010X100
...
MR0: X110X111
MR0: X000X000
MR1: XXXXX001
(Note 7)
MR0: X000X001
MR1: XXXXX001
(Note 7)
MR0: X000X010
MR1: XXXXX001
(Note 7)
...
MR0: X110X111
MR1: XXXXX001
(Note 7)
MR0: X000X000
MR1: XXXXX010
(Note 7)
...
MR0: X110X111
MR1: XXXXX111
(Note 7)
MR0: XXX1XXXX
MR1: XXXXXXXX
(Note 7)
Register Descriptions
Note 7: Mode Register
Note 8: In a device with 8 LSPs there are 2
Bit 3 is normally set to logic 0 so that TCK
when the local scan ports are parked in the Parked-RTI,
Bit 3
1
0
1
0
X
LSP n
Parked
Parked
Unparked
Unparked
Parked-TLR
TABLE 8. Test Clock Configuration
1
is only available in the HDL version (up to eight LSPs). The Silicon version has three LSPs and uses Mode Register
Scan Chain Configuration (if unparked)
TDI
TDI
TDI
TDI
TDI
TDI
TDI
TDI
TDI
TDI
TDI
TDI
...
TDI
TDO
TDI
TDI
TDI
...
TDI
→ LSP
TDI
...
TDI
LSP
TDI
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
5
B
TCK n
Stopped
Free-running
Free-running
Free-running
Stopped after 512 clock pulses
→ Register → LSP
→ Register → LSP
→ Register → LSP
→ Register → LSP
→ Register → LSP
→ Register → LSP
→ Register → LSP
→ Register → LSP
→ Register → LSP
→ Register → LSP
→ Register → LSP
→ Register → LSP
→ Register → LSP
→ Register → LSP
→ Register → LSP
→ Register → LSP
→ Register → LSP
→ Register → LSP
→ Register → LSP
→ Register → TDO
→ PAD → LSP
5
→ PAD → TDO
TABLE 7. Mode Register Control of LSPN (Continued)
8
possible LSPN configurations: No LSPs, each individual LSP, combinations of 2 to 7 LSPs, and all 8 LSPs.
(Continued)
6
n
→ PAD → LSP
is free-running
0
1
0
2
0
1
0
3
0
1
0
2
0
5
0
1
0
6
0
B
B
→ PAD → TDO
→ PAD → TDO
→ PAD → LSP
→ PAD → TDO
→ PAD → LSP
→ PAD → LSP
→ PAD → LSP
→ PAD → TDO
→ PAD → LSP
→ PAD → LSP
→ PAD → LSP
→ PAD → LSP
→ PAD → LSP
→ PAD → TDO
→ PAD → LSP
→ PAD → LSP
→ PAD →→ LSP
→ PAD → TDO
→ PAD → LSP
(Loopback)
7
→ PAD → TDO
17
1
2
2
1
3
3
1
3
1
5
5
1
B
B
B
B
B
B
→ PAD → TDO
→ PAD → TDO
→ PAD → TDO
→ PAD → LSP
→ PAD → TDO
→ PAD → TDO
→ PAD → LSP
→ PAD → TDO
→ PAD → LSP
→ PAD → TDO
→ PAD → TDO
→ PAD → LSP
1
Parked-Pause-DR or Parked-Pause-IR state. When the local
ports are parked, bit 3 can be programmed with logic 1,
forcing all of the LSP TCK
used in power sensitive applications to reduce the power
consumed by the test circuitry in parts of the system that are
not under test. When in the Parked-TLR state, TCK
(stopped) after 512 clock pulses have been received on
TCK
Bit 7 is a status bit for the TCK counter. Bit 7 is only set (logic
1) when the TCK counter is on and has reached terminal
→ PAD → LSP
B
independent of the bit 3 value.
B
2
5
2
2
B
B
B
B
B
B
B
B
→ PAD → TDO
→ PAD → TDO
→ PAD → LSP
→ PAD → LSP
2
→ PAD → LSP
n
’s to stop. This feature can be
3
3
B
B
→ PAD → LSP
→ PAD → LSP
3
→ PAD → LSP
0
only.
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4
4
→ PAD →
→ PAD →
n
4
is gated
→ PAD