SLXT334QE.B3 Intel, SLXT334QE.B3 Datasheet - Page 28

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SLXT334QE.B3

Manufacturer Part Number
SLXT334QE.B3
Description
Manufacturer
Intel
Datasheet

Specifications of SLXT334QE.B3

Operating Supply Voltage (typ)
5V
Screening Level
Industrial
Mounting
Surface Mount
Operating Supply Voltage (min)
4.75V
Operating Supply Voltage (max)
5.25V
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Lead Free Status / RoHS Status
Not Compliant
LXT334 — Quad Short-Haul Transceiver with Clock Recovery
28
RPOS/RNEG data low time (MCLK=H)
RPOS/RNEG to RCLK
rising setup time
RCLK rising to RPOS/RNEG
hold time
Delay time between RPOS/RNEG and RCLK
1. Typical figures are at 25 °C and are for design aid only; not guaranteed and not subject to production testing.
2. RCLK duty cycle will vary depending on extent of received pulse jitter displacement. Maximum and minimum RCLK duty
3. This mode disables clock recovery.
4. If MCLK is High, the PLL clock recovery circuits are disabled. RPOSx and RNEGx are fed to an internal XOR gate that
cycles are for worst case jitter conditions (0.2 U.I. displacement for E1 and 0.4 U.I. for T1 operation).
connects this output to RCLKx for external clock recovery.
Table 13. Receive Timing Characteristics (over recommended range) (Continued)
Figure 15. LXT334 Receive Timing Diagram
Parameter
3,4
E1
T1
E1
T1
t
Sym
PWD
t
t
SUR
SUR
t
t
HR
HR
1
Min
200
50
50
50
50
Typ
244
203
270
203
270
5
1
Max
300
Unit
ns
ns
ns
ns
ns
ns
MCLK = H
Condition
Test
Datasheet

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