LU82541ER Intel, LU82541ER Datasheet - Page 2

• Manufacturer Part Number: LU82541ER
• Manufacturer: Intel

Specifications of LU82541ER

• Operating Supply Voltage (typ): 1.8/3.3V
• Operating Temperature Classification: Commercial
• Package Type: BGA
• Mounting: Surface Mount
• Pin Count: 196
• Lead Free Status / RoHS Status: Compliant

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Revision History
June 2006
June 2006
Sept 2006
June 2008
Aug 2003
Mar 2004
Nov 2004
Feb 2005
July 2005
Aug 2005
Aug 2006
Aug 2007
Oct 2004
Jan 2005
Apr 2005
Date
Revision
2.0
3.0
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
3.9
4.0
4.1
4.2
4.3
Non-classified release.
Updated Section 4, “Voltage, Temperature, and Timing Specifications,” for the C-0
stepping.
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Corrected EEMODE signal description.
Updated signal names to match design guide and reference schematics.
Corrected pinout discrepancies between sections “Signal Descriptions” and
“Package and Pinout Information”.
Added lead free information.
Added information about migrating from a 2-layer 0.36 mm wide-trace substrate to
a 2-layer 0.32 mm wide-trace substrate. Refer to the section on Package and
Pinout Information.
Added statement that no changes to existing soldering processes are needed for
the 2-layer 0.32 mm wide-trace substrate change in the section describing
“Package Information”.
Added new maximum values for DC supply voltages on 1.2 V and 1.8 V pins. See
Table 2, Recommended Operating Conditions and Table 6, DC Characteristics.
Updated Visual Pin Assignment diagram for pinouts F9, F10, E14, F14, and H14.
Removed all references to CLK_RUN# signal.
Corrected the FLSH_SO/LAN_DISABLE signal definition. If Flash functionality is
not used then an external pull-down resistor is required.
Added pin C8 description to Table 29 and Table 31.
Corrected 25 MHz Clock Input Requirements in Table 13.
Corrected the FLSH_SO/LAN_DISABLE signal definition. If Flash functionality is
not used then an external pull-up resistor is required.
Updated Table 13 “25 MHz Clock Input Requirements”.
Updated Table 40 descriptions for pins A10, B10, and C9.
Updated pinout descriptions from Tables 25 - 42 to match Figure 13.
Removed note “b” from Table 2 and note “a” from Tables 3 and 4. Moved the note
following Table 5 before Table 3 “3.3V Supply Voltage Ramp”
Added new Intel logo, updated “Product Features”, and added new document
ordering information to copyright page.
Clarified product ordering codes.
Notes