TS81102G0VTP E2V, TS81102G0VTP Datasheet - Page 23

• Manufacturer Part Number: TS81102G0VTP
• Manufacturer: E2V

Specifications of TS81102G0VTP

• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Temp Range: -40C to 110C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Not Compliant

Package Description
Pin Description
Table 7. TS81102G0 Pin Description
2105C–BDC–11/03
Type
Digital Inputs
Outputs
Control Signals
Synchronization
Power Supplies
Name
I[0…9]
Clkln
A[0…9]
DR
RefA
ClklnType
RatioSel
Bist
SwiAdj
Diode
NbBit
AsyncReset
SyncReset
DMUXDelAdjCtrl
ADCDelAdjCtrl
ADCDelAdjln
ADCDelAdjOut
GND
V
V
V
EE
PlusDOut
CC
RefH
H[0…9]
Levels
Differential ECL
Differential ECL
Adjustable Logic
Single
Adjustable Logic
Differential
Adjustable Single
TTL
TTL
TTL
0V ± 0.5V
Analog
TTL
TTL
Differential ECL
Differential analog
input of ±0.5V
around 0V
common mode
Differential analog
input of ±0.5V
around 0V
common mode
Differential ECL
50 differential
output
Ground 0V
Power -5V
Adjustable power
from 0V to +3.3V
Power +5V
Comments
Data input.
On-chip 100 differential termination resistor.
Clock input (Data Ready ADC).
On-chip 100 differential termination resistor.
Data ready for port A to H.
Common mode is adjusted with VplusDOut. Swing is adjusted with
SwiAdj. 50 termination possible.
Data ready for channel A to H.
Common mode is adjusted with VplusDOut. Swing is adjusted with
SwiAdj. 50 termination possible.
Reference voltage for output channels A to H.
Common mode is adjustable with VplusDOut. 50 termination
possible.
DataReady or Dataready/2: logic 1: Data Ready.
DMUX ratio; logic 1: 1:4
Reset and Switch of built-in Self Test (BIST): logic 0: BIST active.
Swing fine adjustment of output buffers.
Diode for chip temperature measurement.
Number of bit 8 or 10: logic 1: 10-bit.
Asynchronous reset: logic 1: reset on.
Synchronous reset: active on rising edge.
Control of the delay line of DataReady input:
differential input = -0.5V: delay = 250 ps
differential input = 0V: delay = 500 ps
differential input = 0.5V: delay = 750 ps
Control of the delay line for ADC:
differential input = - 0.5V: delay = 250 ps
differential input = 0V: delay = 500 ps
differential input = 0.5V: delay = 750 ps
Stand-alone delay adjust input for ADC.
Differential termination of 100 inside the buffer.
Stand-alone delay adjust output for ADC.
Common ground.
Digital negative power supply.
Common mode adjustment of output buffers.
Digital positive power supply.
TS81102G0
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