SI3056-D-FSR Silicon Laboratories Inc, SI3056-D-FSR Datasheet - Page 49

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SI3056-D-FSR

Manufacturer Part Number
SI3056-D-FSR
Description
Modem Chip Chipset 56Kbps 16-Pin SOIC T/R
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of SI3056-D-FSR

Package
16SOIC
Main Category
Chipset
Maximum Data Rate
56 Kbps
Typical Operating Supply Voltage
3.3 V
Power Supply Type
Analog
Typical Supply Current
15 mA
Minimum Operating Supply Voltage
3 V
Maximum Operating Supply Voltage
3.6 V
Lead Free Status / RoHS Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SI3056-D-FSR
Manufacturer:
DSC
Quantity:
1 200
Register 1. Control 1
Reset settings = 0000_0000
Bit
5:4
Name
Type
7
6
3
2
1
0
Bit
PWMM[1:0] Pulse Width Modulation Mode.
Reserved
Reserved
PWME
Name
IDL
SR
SB
R/W
SR
D7
Software Reset.
0 = Enables the DAA for normal operation.
1 = Sets all registers to their reset value.
Note: Bit automatically clears after being set.
Read returns zero.
Used to select the type of signal output on the call progress AOUT pin.
00 = PWM output is clocked at 16.384 MHz as a delta-sigma data stream. A local density of
1s and 0s tracks the combined transmit and receive signals.
01 = Balanced conventional PWM output signal has high and low portions of the modulated
pulse that are centered on the 16 kHz sample clock.
10 = Conventional PWM output signal returns to logic 0 at regular 32 kHz intervals and rises
at a time in the 32 kHz period proportional to its instantaneous amplitude.
11 = Reserved.
Pulse Width Modulation Enable.
Sums the transmit and receive audio paths and presents it as a CMOS digital-level output of
PWM data. Use the circuit in “Figure 18. AOUT PWM Circuit for Call Progress” .
0 = Pulse width modulation signal for AOUT disabled.
1 = Pulse width modulation signal for call progress analog output (AOUT) enabled.
Read returns zero.
Isolation Digital Loopback.
0 = Digital loopback across the isolation barrier is disabled.
1 = Enables digital loopback mode across the isolation barrier. The line-side device must be
enabled and off hook before setting this mode. This data path includes the TX and RX filters.
Serial Digital Interface Mode.
0 = Operation is in 15-bit mode, and the LSB of the data field indicates that a secondary
frame is required.
1 = The serial port is operating in 16-bit mode and requires a secondary frame sync signal,
FC, to initiate control data reads/writes.
D6
D5
PWMM[1:0]
R/W
D4
PWME
R/W
D3
Rev. 1.05
D2
Function
R/W
IDL
D1
R/W
SB
D0
Si3018/19/10
49

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