SI3056-D-FSR Silicon Laboratories Inc, SI3056-D-FSR Datasheet - Page 74

• Manufacturer Part Number: SI3056-D-FSR
• Description: Modem Chip Chipset 56Kbps 16-Pin SOIC T/R
• Manufacturer: Silicon Laboratories Inc

Specifications of SI3056-D-FSR

• Package: 16SOIC
• Main Category: Chipset
• Maximum Data Rate: 56 Kbps
• Typical Operating Supply Voltage: 3.3 V
• Power Supply Type: Analog
• Typical Supply Current: 15 mA
• Minimum Operating Supply Voltage: 3 V
• Maximum Operating Supply Voltage: 3.6 V
• Lead Free Status / RoHS Status: Compliant

Si3018/19/10
Register 39. RX Gain Control 2 (Si3019 Line-Side Device Only)
Reset settings = 0000_0000
74
Bit
7:5
3:0
Name
Type
4
Bit
RXG2[3:0] Receive Gain 2.
Reserved Read returns zero.
Name
RGA2
D7
Receive Gain or Attenuation 2.
0 = Incrementing the RXG2[3:0] bits results in gaining up the receive path.
1 = Incrementing the RXG2[3:0] bits results in attenuating the receive path.
Each bit increment represents 1 dB of gain or attenuation, up to a maximum of +12 dB and –
15 dB respectively.
For example:
RGA2
X
0
0
0
1
1
1
D6
D5
RXG2[3:0]
0000
0001
11xx
0001
1111
:
:
RGA2
R/W
D4
D3
15 dB attenuation is applied to the receive path.
Rev. 1.05
Result
0 dB gain or attenuation is applied to the receive path.
1 dB gain is applied to the receive path.
12 dB gain is applied to the receive path.
1 dB attenuation is applied to the receive path.
D2
RXG2[3:0]
Function
R/W
D1
D0