WJLXT972MLC.A4 S L7U9 Intel, WJLXT972MLC.A4 S L7U9 Datasheet - Page 68
WJLXT972MLC.A4 S L7U9
Manufacturer Part Number
WJLXT972MLC.A4 S L7U9
Description
Manufacturer
Intel
Datasheet
1.WJLXT972MLC.A4_S_L7U9.pdf
(92 pages)
Specifications of WJLXT972MLC.A4 S L7U9
Lead Free Status / RoHS Status
Compliant
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Intel
68
Figure 25. Intel
Table 33. Intel
®
LXT972M Single-Port 10/100 Mbps PHY Transceiver
TXD, TX_EN, setup to TX_CLK High
TXD, TX_EN, hold from TX_CLK High
TX_EN sampled to CRS asserted
TX_EN sampled to CRS de-asserted
TX_EN sampled to TPO out
(Tx latency)
1. Typical values are at 25 °C and are for design aid only, not guaranteed, and not subject to production
2. BT (Bit Time) is the duration of one bit as transferred to and from the MAC and is the reciprocal of the bit
TX_EN
testing.
rate. 10BASE-T bit time = 10
TX_CLK
®
TXD,
®
CRS
TPO
LXT972M Transceiver 10BASE-T Transmit Timing
LXT972M Transceiver 10BASE-T Transmit Timing
Parameter
t
1
t
3
-7
s or 100 ns.
t
5
Symbol
t1
t2
t3
t4
t5
Min
10
–
–
0
–
t
2
Typ
72.5
–
–
2
1
1
Max
–
–
–
–
–
t
4
Document Number: 302875-005
Units
BT
BT
BT
ns
ns
Revision Date: 27-Oct-2005
2
Test Conditions
Datasheet
B3461-01
–
–
–
–
–
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