ADM7001XACT1XP Lantiq, ADM7001XACT1XP Datasheet - Page 38

• Manufacturer Part Number: ADM7001XACT1XP
• Manufacturer: Lantiq

Specifications of ADM7001XACT1XP

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Figure 12
3.2.7
Figure 13
sense is detected and asserted asynchronously to RXCLK by ADM7001. When ADM7001 detects there is valid
data, RXDV and the received data are presented onto RXD[3:0] synchronously to RX_CLK. Whenever received
data is not valid anymore, RXDV will be de-asserted by ADM7001 and "0" will be put on RXD[3:0].
Figure 13
Figure 14
is asserted asynchronously to RXCLK as in the valid receive case shown in
is detected, RXD[3:0] is changed to (1110) and RXER is asserted. Both RXD[3:0] and RXER transit synchronously
to RXCLK.
Data Sheet
shows the relationship among RXCLK, RXDV, RXD and CRS during a reception of valid packet. Carrier
shows the relationship among RXCLK, RXDV and RXD[3:0] during a received false carrier event. CRS
MII Signal Diagram
Receive Path for MII
MII Receive Without Error
38
Figure
15. However, once false carrier
Function Description
Rev. 1.07, 2005-09-12
Data sheet
ADM7001