EELXT901APC.A4 S L8L5 Cortina Systems Inc, EELXT901APC.A4 S L8L5 Datasheet - Page 29

• Manufacturer Part Number: EELXT901APC.A4 S L8L5
• Manufacturer: Cortina Systems Inc

Specifications of EELXT901APC.A4 S L8L5

• Lead Free Status / RoHS Status: Compliant

3.4.6
Datasheet
Document #: 249097
Revision #: 002
Rev. Date: June 19, 2001
Figure 15. AUI Encoder/Decoder Only Application
GREEN
AM7990 BACK-END/
PROGRAMMING
CONTROLLER
330
INTERFACE
LOOPBACK
LINE STATUS
CONTROL
REMOTE
OPTIONS
AUI Encoder/Decoder ONLY
In
and PAUI is tied High, manually selecting the AUI port. The twisted-pair port is not used. With
MD1 and MD0 both tied Low, the logic and framing are set to Mode 1 (compatible with AMD
AM7990 controllers). The LI pin is tied Low, disabling the link test function. The DSQE pin is also
tied Low, enabling the SQE function on the LXT907. The LBK input controls loop back. A
20 MHz system clock is supplied at CLK1, with CLK0 left open.
STATUS
Figure
1
Red Red Red
330
SYSTEM
CLOCK
Bias resistor RBIAS should be located close to the pin and isolated from the other signals.
+5 V
330
15, the DTE is connected to a coaxial network through the AUI. AUTOSEL is tied Low
330
TENA
TCLK
TX
RCLK
RX
RENA
CLSN
LBK
20 MHz
TEST
TXD
TEN
TCLK
RCLK
RXD
CD
COL
LBK
PAUI
NTH
MD0
MD1
DSQE (907)
LI
RJAB
RLD
RCMPT
JAB
PLR
LEDC/FDE
LEDR
LEDT/PDN
LEDL
VCC1
VCC2
AUTOSEL
CLKI
Universal 10BASE-T and AUI Transceivers — LXT901/907
GND1
Left Open
CLKO
RBIAS
GND2
DON
DOP
CIN
CIP
DIN
DIP
78
12.4
78
78
1
5
7
8
1
2
4
1:1
1:1
15
16
13
12
10
9
Chassis
10
11
12
13
14
15
9
Gnd
1
2
3
4
5
6
7
8
+ 12 V
Fuse
29