SI3206-B-GQ Silicon Laboratories Inc, SI3206-B-GQ Datasheet - Page 80

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SI3206-B-GQ

Manufacturer Part Number
SI3206-B-GQ
Description
IC PROSLIC LINE FEED 125V 48TQFP
Manufacturer
Silicon Laboratories Inc
Series
ProSLIC®r
Datasheets

Specifications of SI3206-B-GQ

On-hook Transmission
Yes
Polarity Reversal
Yes
On-chip Ring Relay Driver
Yes
Longitudinal Balanced
63
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
-40C to 85C
Package Type
TQFP
Loop Current Limit
45mA
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Function
Subscriber Line Interface Concept (SLIC)
Interface
GCI, PCM, SPI
Number Of Circuits
4
Voltage - Supply
3.3V
Current - Supply
*
Power (watts)
*
Operating Temperature
*
Mounting Type
Surface Mount
Package / Case
48-TQFP Exposed Pad
Includes
*
Lead Free Status / RoHS Status
Compliant

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Si3232
PMTALO: Pulse Metering Oscillator Active Timer—Low Byte (Register Address 29)
(Register type: Initialization)
Reset settings = 0x00
PMTIHI: Pulse Metering Oscillator Inactive Timer—High Byte (Register Address 32)
(Register type: Initialization)
Reset settings = 0x00
PMTILO: Pulse Metering Oscillator Inactive Timer—Low Byte (Register Address 31)
(Register type: Initialization)
Reset settings = 0x00
80
Name
Name
Name
Type
Type
Type
Bit
7:0
Bit
7:0
Bit
7:0
Bit
Bit
Bit
PULSETI[15:8] Pulse Metering Oscillator Inactive Timer.
PULSETA[7:0]
PULSETI[7:0]
Name
Name
Name
D7
D7
D7
D6
D6
D6
Pulse Metering Oscillator Active Timer.
This register contains the lower 8 bits of the pulse-metering oscillator active timer.
Register 30 contains the upper 8 bits of this value. 1.25 µ s/LSB.
This register contains the upper 8 bits of the pulse-metering oscillator inactive timer.
Register 29 contains the lower 8 bits of this value.
Pulse Metering Oscillator Inactive Timer.
This register contains the lower 8 bits of the pulse-metering oscillator inactive timer.
Register 30 contains the upper 8 bits of this value. 1.25 µ s/LSB.
D5
D5
D5
Preliminary Rev. 0.96
PULSETI[15:8]
D4
PULSETA[7:0]
D4
D4
PULSETI[7:0]
R/W
R/W
R/W
D3
D3
D3
Function
Function
Function
D2
D2
D2
D1
D1
D1
D0
D0
D0

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