PIC16F1507-E/SO Microchip Technology, PIC16F1507-E/SO Datasheet - Page 19

3.5KB Flash, 128B RAM, 18 I/O, CLC, CWG, DDS, 10-bit ADC 20 SOIC .300in TUBE

PIC16F1507-E/SO

Manufacturer Part Number
PIC16F1507-E/SO
Description
3.5KB Flash, 128B RAM, 18 I/O, CLC, CWG, DDS, 10-bit ADC 20 SOIC .300in TUBE
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F1507-E/SO

Processor Series
PIC16
Core
PIC16F
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
3.5 KB
Data Ram Size
128 B
Interface Type
ICSP
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
18
Number Of Timers
3
Operating Supply Voltage
2.3 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
SOIC-20
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 125 C
Supply Current (max)
30 uA
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
-
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
17
Eeprom Size
-
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Lead Free Status / Rohs Status
 Details
PIC16(L)F1507
3.2.2
The Special Function Registers are registers used by
the application to control the desired operation of
peripheral functions in the device. The Special Function
Registers occupy the 20 bytes after the core registers of
every data memory bank (addresses x0Ch/x8Ch
through x1Fh/x9Fh). The registers associated with the
operation of the peripherals are described in the appro-
priate peripheral chapter of this data sheet.
3.2.3
There are up to 80 bytes of GPR in each data memory
bank. The Special Function Registers occupy the 20
bytes after the core registers of every data memory
bank (addresses x0Ch/x8Ch through x1Fh/x9Fh).
3.2.3.1
The general purpose RAM can be accessed in a
non-banked method via the FSRs. This can simplify
access to large memory structures. See Section 3.5.2
“Linear Data Memory” for more information.
3.2.4
There are 16 bytes of common RAM accessible from all
banks.
DS41586A-page 19
SPECIAL FUNCTION REGISTER
GENERAL PURPOSE RAM
COMMON RAM
Linear Access to GPR
Preliminary
FIGURE 3-2:
3.2.5
The memory maps for PIC16(L)F1507 are as shown in
Table
7-bit Bank Offset
3-3.
DEVICE MEMORY MAPS
0Ch
0Bh
1Fh
6Fh
7Fh
00h
20h
70h
Special Function Registers
BANKED MEMORY
PARTITIONING
General Purpose RAM
 2011 Microchip Technology Inc.
(20 bytes maximum)
(80 bytes maximum)
Memory Region
Core Registers
Common RAM
(12 bytes)
(16 bytes)

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