PIC16F1847-I/SO Microchip Technology, PIC16F1847-I/SO Datasheet - Page 97

• Manufacturer Part Number: PIC16F1847-I/SO
• Description: 14 KB Flash, 1K Bytes RAM, 32 MHz Int. Osc, 16 I/0, Enhanced Mid Range Core 18 S
• Manufacturer: Microchip Technology

Specifications of PIC16F1847-I/SO

• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

8.5.9
The PIR4 register contains the interrupt flag bits, as
shown in
REGISTER 8-9:
TABLE 8-1:
 2011 Microchip Technology Inc.
INTCON
OPTION_REG
PIE1
PIE2
PIE3
PIE4
PIR1
PIR2
PIR3
PIR4
Legend:
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7-2
bit 1
bit 0
Name
U-0
—
Register
— = unimplemented locations read as ‘0’. Shaded cells are not used by Interrupts.
PIR4 REGISTER
Unimplemented: Read as ‘0’
BCL2IF: MSSP2 Bus Collision Interrupt Flag bit
1 = A Bus Collision was detected (must be cleared in software)
0 = No Bus collision was detected
SSP2IF: Master Synchronous Serial Port 2 (MSSP2) Interrupt Flag bit
1 = The Transmission/Reception/Bus Condition is complete (must be cleared in software)
0 = Waiting to Transmit/Receive/Bus Condition in progress
TMR1GIE
TMR1GIF
WPUEN
SUMMARY OF REGISTERS ASSOCIATED WITH INTERRUPTS
8-9.
OSFIE
OSFIF
Bit 7
GIE
—
—
—
—
U-0
—
PIR4: PERIPHERAL INTERRUPT REQUEST REGISTER 4
INTEDG
PEIE
ADIE
C2IE
ADIF
Bit 6
C2IF
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
—
—
—
—
U-0
—
TMR0CS
TMR0IE
CCP4IE
CCP4IF
RCIE
C1IE
RCIF
Bit 5
C1IF
—
—
U-0
Preliminary
—
TMR0SE
CCP3IE
CCP3IF
INTE
TXIE
EEIE
Bit 4
TXIF
EEIF
—
—
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
HS = Bit is set by hardware
TMR6IE
SSP1IE
TMR6IF
BCL1IE
SSP1IF
BCL1IF
U-0
IOCE
Bit 3
PSA
—
—
—
Note 1: Interrupt flag bits are set when an inter-
TMR0IF
CCP1IE
CCP1IF
Bit 2
PS2
rupt condition occurs, regardless of the
state of its corresponding enable bit or
the Global Enable bit, GIE of the INTCON
register. User software should ensure the
appropriate interrupt flag bits are clear
prior to enabling an interrupt.
—
—
—
—
—
—
U-0
PIC16(L)F1847
—
TMR2IE
TMR4IE
TMR2IF
TMR4IF
BCL2IE
BCL2IF
Bit 1
INTF
PS1
—
—
R/W/HS-0/0
BCL2IF
TMR1IE
CCP2IE
TMR1IF
CCP2IF
SSP2IE
SSP2IF
IOCF
Bit 0
PS0
—
—
DS41453A-page 97
R/W/HS-0/0
SSP2IF
Register
on Page
177
89
90
91
92
93
94
95
96
97
bit 0