PIC16LF1507-E/SS Microchip Technology, PIC16LF1507-E/SS Datasheet - Page 89

3.5KB Flash, 128B RAM, 18 I/O, CLC, CWG, DDS, 10-bit ADC 20 SSOP .209in TUBE

PIC16LF1507-E/SS

Manufacturer Part Number
PIC16LF1507-E/SS
Description
3.5KB Flash, 128B RAM, 18 I/O, CLC, CWG, DDS, 10-bit ADC 20 SSOP .209in TUBE
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheet

Specifications of PIC16LF1507-E/SS

Processor Series
PIC16
Core
PIC16F
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
3.5 KB
Data Ram Size
128 B
Interface Type
ICSP
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
18
Number Of Timers
3
Operating Supply Voltage
2.3 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
SSOP-20
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 125 C
Supply Current (max)
30 uA
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
-
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
17
Eeprom Size
-
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16LF1507-E/SS
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
PIC16(L)F1507
10.2.4
Program memory is programmed using the following
steps:
1.
2.
3.
4.
Before writing to program memory, the word(s) to be
written must be erased or previously unwritten. Pro-
gram memory can only be erased one row at a time. No
automatic erase occurs upon the initiation of the write.
Program memory can be written one or more words at
a time. The maximum number of words written at one
time is equal to the number of write latches. See
Figure 10-5
write latches) for more details.
The write latches are aligned to the Flash row address
boundary
PMADRH:PMADRL, (PMADRH<6:0>:PMADRL<7:4>)
with the lower 4-bits of PMADRL, (PMADRL<3:0>)
determining the write latch being loaded. Write opera-
tions do not cross these boundaries. At the completion
of a program memory write operation, the data in the
write latches is reset to contain 0x3FFF.
DS41586A-page 89
Load the address in PMADRH:PMADRL of the
row to be programmed.
Load each write latch with data.
Initiate a programming operation.
Repeat steps 1 through 3 until all data is written.
WRITING TO FLASH PROGRAM
MEMORY
defined
(row writes to program memory with 16
by
the
upper
11-bits
Preliminary
of
The following steps should be completed to load the
write latches and program a row of program memory.
These steps are divided into two parts. First, each write
latch is loaded with data from the PMDATH:PMDATL
using the unlock sequence with LWLO = 1. When the
last word to be loaded into the write latch is ready, the
LWLO bit is cleared and the unlock sequence
executed. This initiates the programming operation,
writing all the latches into Flash program memory.
1.
2.
3.
4.
5.
6.
7.
8.
9.
10. Load the PMDATH:PMDATL register pair with
11. Execute the unlock sequence (Section 10.2.2
An example of the complete write sequence is shown in
Example
PMADRH:PMADRL register pair; the data is loaded
using indirect addressing.
Note:
Note:
Set the WREN bit of the PMCON1 register.
Clear the CFGS bit of the PMCON1 register.
Set the LWLO bit of the PMCON1 register.
When the LWLO bit of the PMCON1 register is
‘1’, the write sequence will only load the write
latches and will not initiate the write to Flash
program memory.
Load the PMADRH:PMADRL register pair with
the address of the location to be written.
Load the PMDATH:PMDATL register pair with
the program memory data to be written.
Execute the unlock sequence (Section 10.2.2
“Flash Memory Unlock Sequence”). The write
latch is now loaded.
Increment the PMADRH:PMADRL register pair
to point to the next location.
Repeat steps 5 through 7 until all but the last
write latch has been loaded.
Clear the LWLO bit of the PMCON1 register.
When the LWLO bit of the PMCON1 register is
‘0’, the write sequence will initiate the write to
Flash program memory.
the program memory data to be written.
“Flash Memory Unlock Sequence”). The
entire program memory latch content is now
written to Flash program memory.
10-3. The initial address is loaded into the
The special unlock sequence is required
to load a write latch with data or initiate a
Flash programming operation. If the
unlock sequence is interrupted, writing to
the latches or program memory will not be
initiated.
The program memory write latches are
reset to the blank state (0x3FFF) at the
completion of every write or erase
operation. As a result, it is not necessary
to load all the program memory write
latches. Unloaded latches will remain in
the blank state.
 2011 Microchip Technology Inc.

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