PIC16LF1906-E/SS Microchip Technology, PIC16LF1906-E/SS Datasheet - Page 118
PIC16LF1906-E/SS
Manufacturer Part Number
PIC16LF1906-E/SS
Description
14KB Flash, 512B RAM, LCD, 11x10b ADC, EUSART, NanoWatt XLP 28 SSOP .209in TUBE
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheet
1.PIC16LF1904-EMV.pdf
(288 pages)
Specifications of PIC16LF1906-E/SS
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
LIN, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-SSOP (0.209", 5.30mm Width)
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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PIC16LF1904/6/7
12.6
REGISTER 12-1:
REGISTER 12-2:
REGISTER 12-3:
DS41569A-page 118
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7-0
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7-0
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7-0
R/W/HS-0/0
R/W-0/0
IOCBP7
R/W-0/0
IOCBN7
IOCBF7
Interrupt-On-Change Registers
IOCBP<7:0>: Interrupt-on-Change Positive Edge Enable bits
1 = Interrupt-on-Change enabled on the pin for a positive going edge. Associated Status bit and
0 = Interrupt-on-Change disabled for the associated pin.
IOCBN<7:0>: Interrupt-on-Change Negative Edge Enable bits
1 = Interrupt-on-Change enabled on the pin for a negative going edge. Associated Status bit and
0 = Interrupt-on-Change disabled for the associated pin.
IOCBF<7:0>: Interrupt-on-Change Flag bits
1 = An enabled change was detected on the associated pin.
0 = No change was detected, or the user cleared the detected change.
R/W/HS-0/0
R/W-0/0
IOCBP6
R/W-0/0
IOCBN6
IOCBF6
Set when IOCBPx = 1 and a rising edge was detected on RBx, or when IOCBNx = 1 and a falling
edge was detected on RBx.
interrupt flag will be set upon detecting an edge.
interrupt flag will be set upon detecting an edge.
IOCBP: INTERRUPT-ON-CHANGE POSITIVE EDGE REGISTER
IOCBN: INTERRUPT-ON-CHANGE NEGATIVE EDGE REGISTER
IOCBF: INTERRUPT-ON-CHANGE FLAG REGISTER
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
R/W/HS-0/0 R/W/HS-0/0 R/W/HS-0/0
R/W-0/0
IOCBP5
R/W-0/0
IOCBN5
IOCBF5
R/W-0/0
IOCBP4
R/W-0/0
IOCBN4
IOCBF4
Preliminary
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
HS - Bit is set in hardware
IOCBP3
IOCBN3
R/W-0/0
R/W-0/0
IOCBF3
R/W/HS-0/0
IOCBN2
R/W-0/0
IOCBP2
R/W-0/0
IOCBF2
2011 Microchip Technology Inc.
R/W/HS-0/0
IOCBN1
R/W-0/0
IOCBP1
R/W-0/0
IOCBF1
R/W/HS-0/0
R/W-0/0
IOCBP0
R/W-0/0
IOCBN0
IOCBF0
bit 0
bit 0
bit 0
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