PIC16LF1906T-I/SS Microchip Technology, PIC16LF1906T-I/SS Datasheet - Page 74

14KB Flash, 512B RAM, LCD, 11x10b ADC, EUSART, NanoWatt XLP 28 SSOP .209in T/R

PIC16LF1906T-I/SS

Manufacturer Part Number
PIC16LF1906T-I/SS
Description
14KB Flash, 512B RAM, LCD, 11x10b ADC, EUSART, NanoWatt XLP 28 SSOP .209in T/R
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheet

Specifications of PIC16LF1906T-I/SS

Processor Series
PIC16LF
Core
PIC
Data Bus Width
8 bit
Program Memory Type
Flash
Data Ram Size
512 B
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
25
Number Of Timers
1 x 16-bit, 1 x 8-bit
Operating Supply Voltage
1.8 V to 5.5 V
Mounting Style
SMD/SMT
Package / Case
QFN-28
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
LIN, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
14KB (8K x 14)
Eeprom Size
-
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Lead Free Status / Rohs Status
 Details
PIC16LF1904/6/7
7.6.3
The PIE2 register contains the interrupt enable bits, as
shown in
REGISTER 7-3:
DS41569A-page 74
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7-3
bit 2
bit 1-0
U-0
Register
PIE2 REGISTER
Unimplemented: Read as ‘0’
LCDIE: LCD Module Interrupt Enable bit
1 = Enables the LCD module interrupt
0 = Disables the LCD module interrupt
Unimplemented: Read as ‘0’
7-3.
U-0
PIE2: PERIPHERAL INTERRUPT ENABLE REGISTER 2
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U-0
U-0
Preliminary
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
U-0
Note:
Bit PEIE of the INTCON register must be
set to enable any peripheral interrupt.
R/W-0/0
LCDIE
 2011 Microchip Technology Inc.
U-0
U-0
bit 0

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