PIC16LF723A-I/MV Microchip Technology, PIC16LF723A-I/MV Datasheet - Page 123
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PIC16LF723A-I/MV
Manufacturer Part Number
PIC16LF723A-I/MV
Description
7 KB Flash, 16 MHz Int. Osc, NanoWatt XLP 28 UQFN 4x4x0.5mm TUBE
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheet
1.PIC16F722AT-ISS.pdf
(284 pages)
Specifications of PIC16LF723A-I/MV
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
7KB (4K x 14)
Program Memory Type
FLASH
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 11x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-UFQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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15.0
The Capture/Compare/PWM module is a peripheral
which allows the user to time and control different
events. In Capture mode, the peripheral allows the
timing of the duration of an event. The Compare mode
allows the user to trigger an external event when a
predetermined amount of time has expired. The PWM
mode can generate a Pulse-Width Modulated signal of
varying frequency and duty cycle.
The timer resources used by the module are shown in
Table 15-1.
Additional information on CCP modules is available in
the Application Note AN594, “Using the CCP Modules”
(DS00594).
TABLE 15-2:
2010 Microchip Technology Inc.
Capture
Capture
Compare
PWM
PWM
PWM
Note 1:
Note:
CCP1 Mode
2:
CAPTURE/COMPARE/PWM
(CCP) MODULE
If CCP2 is configured as a Special Event Trigger, CCP1 will clear Timer1, affecting the value captured on
the CCP2 pin.
If CCP1 is in Capture mode and CCP2 is configured as a Special Event Trigger, CCP2 will clear Timer1,
affecting the value captured on the CCP1 pin.
CCPRx
document refer to CCPR1 or CCPR2 and
CCP1 or CCP2, respectively.
INTERACTION OF TWO CCP MODULES
Capture
Compare
Compare
PWM
Capture
Compare
CCP2 Mode
and
CCPx
throughout
Same TMR1 time base
Same TMR1 time base
Same TMR1 time base
The PWMs will have the same frequency and update rate (TMR2 interrupt).
The rising edges will be aligned.
None
None
this
(1, 2)
(1, 2)
PIC16F/LF722A/723A
TABLE 15-1:
Capture
Compare
PWM
Interaction
CCP Mode
CCP MODE – TIMER
RESOURCES REQUIRED
Timer Resource
DS41417A-page 123
Timer1
Timer1
Timer2
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