PIC18F65K90T-I/MR Microchip Technology, PIC18F65K90T-I/MR Datasheet - Page 405

• Manufacturer Part Number: PIC18F65K90T-I/MR
• Description: 32kB Flash, 2kB RAM, 1kB EE, NanoWatt XLP, LCD 64 QFN 9x9x0.9mm T/R
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F65K90T-I/MR

• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• Interface Type: I2C, SPI
• Maximum Clock Frequency: 64 MHz
• Number Of Timers: 8
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 16 Channel
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 64MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 53
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN Exposed Pad
• Lead Free Status / Rohs Status: Details

26.6
When enabled, the HLVD circuitry continues to operate
during Sleep. If the device voltage crosses the trip
point, the HLVDIF bit will be set and the device will
wake-up from Sleep. Device execution will continue
from the interrupt vector address if interrupts have
been globally enabled.
TABLE 26-1:
 2009-2011 Microchip Technology Inc.
HLVDCON VDIRMAG
INTCON
PIR2
PIE2
IPR2
TRISA
Legend: — = unimplemented, read as ‘ 0 ’. Shaded cells are unused by the HLVD module.
Note 1:
Name
Operation During Sleep
PORTA<7:6> and their direction bits are individually configured as port pins based on various primary
oscillator modes. When disabled, these bits read as ‘ 0 ’.
GIE/GIEH PEIE/GIEL TMR0IE
TRISA7
OSCFIF
OSCFIE
OSCFIP
Bit 7
REGISTERS ASSOCIATED WITH HIGH/LOW-VOLTAGE DETECT MODULE
(1)
TRISA6
BGVST
Bit 6
—
—
—
(1)
SSP2IF
SSP2IE
SSP2IP
TRISA5
IRVST
Bit 5
HLVDEN
TRISA4
BLC2IF
BLC2IE
BLC2IP
INT0IE
Bit 4
PIC18F87K90 FAMILY
HLVDL3
BCL1IF
BCL1IE
BCL1IP
TRISA3
26.7
A device Reset forces all registers to their Reset state.
This forces the HLVD module to be turned off.
RBIE
Bit 3
Effects of a Reset
HLVDL2
TMR0IF
HLVDIF
HLVDIE
HLVDIP
TRISA2
Bit 2
HLVDL1
TMR3IF
TMR3IE TMR3GIE
TMR3IP TMR3GIP
TRISA1
INT0IF
Bit 1
TMR3GIF
HLVDL0
TRISA0
RBIF
Bit 0
DS39957D-page 405
Values on
Reset
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