PIC24FJ16GA002-E/SO Microchip Technology, PIC24FJ16GA002-E/SO Datasheet - Page 210
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PIC24FJ16GA002-E/SO
Manufacturer Part Number
PIC24FJ16GA002-E/SO
Description
16-bit Family, 16 MIPS, 16KB Flash, 4096 Bytes RAM, 21 I/O, NanoWatt 28 SOIC .30
Manufacturer
Microchip Technology
Series
PIC® 24Fr
Datasheets
1.PIC24FJ16GA002-ISS.pdf
(52 pages)
2.PIC24FJ16GA002-ISS.pdf
(268 pages)
3.PIC24FJ16GA002-ISS.pdf
(22 pages)
Specifications of PIC24FJ16GA002-E/SO
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, PMP, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
16KB (5.5K x 24)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-SOIC (7.5mm Width)
Processor Series
PIC24FJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
4 KB
Interface Type
I2C, IrDA, SPI, UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
21
Number Of Timers
5
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240011, MA240013, AC164127, DM300027, DV164033, DM240002
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 10 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM240011 - KIT STARTER MPLAB FOR PIC24F MCUAC162088 - HEADER MPLAB ICD2 24FJ64GA004 28AC164339 - MODULE SKT FOR PM3 28SOICDV164033 - KIT START EXPLORER 16 MPLAB ICD2
Eeprom Size
-
Lead Free Status / Rohs Status
Details
- PIC24FJ16GA002-ISS PDF datasheet
- PIC24FJ16GA002-ISS PDF datasheet #2
- PIC24FJ16GA002-ISS PDF datasheet #3
- Current page: 210 of 268
- Download datasheet (2Mb)
PIC24FJ64GA004 FAMILY
REGISTER 24-2:
DS39881D-page 210
bit 23
bit 15
bit 7
Legend:
R = Readable bit
-n = Value when device is unprogrammed
bit 23-16
bit 15
bit 14-13
bit 12-11
bit 10-8
bit 7-6
bit 5
bit 4
bit 3
FCKSM1
R/PO-1
R/PO-1
IESO
U-1
—
Unimplemented: Read as ‘1’
IESO: Internal External Switchover bit
1 = IESO mode (Two-Speed Start-up) enabled
0 = IESO mode (Two-Speed Start-up) disabled
WUTSEL1:WUTSEL0: Voltage Regulator Standby Mode Wake-up Time Select bits
11 = Default regulator start-up time used
01 = Fast regulator start-up time used
x0 = Reserved; do not use
SOSCSEL1:SOSCSEL0: Secondary Oscillator Power Mode Select bits
11 = Default (High Drive Strength) mode
01 = Low-Power (Low Drive Strength) mode
x0 = Reserved; do not use
FNOSC2:FNOSC0: Initial Oscillator Select bits
111 = Fast RC Oscillator with Postscaler (FRCDIV)
110 = Reserved
101 = Low-Power RC Oscillator (LPRC)
100 = Secondary Oscillator (SOSC)
011 = Primary Oscillator with PLL module (XTPLL, HSPLL, ECPLL)
010 = Primary Oscillator (XT, HS, EC)
001 = Fast RC Oscillator with postscaler and PLL module (FRCPLL)
000 = Fast RC Oscillator (FRC)
FCKSM1:FCKSM0: Clock Switching and Fail-Safe Clock Monitor Configuration bits
1x = Clock switching and Fail-Safe Clock Monitor are disabled
01 = Clock switching is enabled, Fail-Safe Clock Monitor is disabled
00 = Clock switching is enabled, Fail-Safe Clock Monitor is enabled
OSCIOFCN: OSCO Pin Configuration bit
If POSCMD1:POSCMD0 = 11 or 00:
1 = OSCO/CLKO/RA3 functions as CLKO (F
0 = OSCO/CLKO/RA3 functions as port I/O (RA3)
If POSCMD1:POSCMD0 = 10 or 01:
OSCIOFCN has no effect on OSCO/CLKO/RA3.
IOL1WAY: IOLOCK One-Way Set Enable bit
1 = The OSCCON<IOLOCK> bit can be set once, provided the unlock sequence has been completed.
0 = The OSCCON<IOLOCK> bit can be set and cleared as needed, provided the unlock sequence has
Unimplemented: Read as ‘1’
WUTSEL1
FCKSM0
R/PO-1
R/PO-1
Once set, the Peripheral Pin Select registers cannot be written to a second time.
been completed
U-1
—
CW2: FLASH CONFIGURATION WORD 2
(1)
r = Reserved bit
PO = Program Once bit
WUTSEL0
OSCIOFCN
R/PO-1
R/PO-1
U-1
—
(1)
SOSCSEL1
IOL1WAY
R/PO-1
R/PO-1
U-1
—
(1)
OSC
U = Unimplemented bit, read as ‘0’
‘1’ = Bit is set
SOSCSEL0
/2)
R/PO-1
U-1
U-1
—
—
(1)
FNOSC2
I2C1SEL
R/PO-1
R/PO-1
U-1
—
(1)
2010 Microchip Technology Inc.
‘0’ = Bit is cleared
POSCMD1
FNOSC1
R/PO-1
R/PO-1
U-1
—
(1)
POSCMD0
FNOSC0
R/PO-1
R/PO-1
U-1
—
bit 16
bit 8
bit 0
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