PIC24HJ64GP510A-E/PF Microchip Technology, PIC24HJ64GP510A-E/PF Datasheet - Page 47

16 Bit MCU 40MIPS 64KB FLASH 100 TQFP 14x14x1mm TRAY

PIC24HJ64GP510A-E/PF

Manufacturer Part Number
PIC24HJ64GP510A-E/PF
Description
16 Bit MCU 40MIPS 64KB FLASH 100 TQFP 14x14x1mm TRAY
Manufacturer
Microchip Technology
Series
PIC® 24Hr

Specifications of PIC24HJ64GP510A-E/PF

Core Processor
PIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
85
Program Memory Size
64KB (22K x 24)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 32x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
5.9
The procedure for reading configuration memory is
similar to the procedure for reading code memory,
except that 16-bit data words are read (with the upper
byte read being all ‘0’s) instead of 24-bit words. Since
there are twelve Configuration registers, they are read
one register at a time.
TABLE 5-9:
© 2010 Microchip Technology Inc.
Step 1: Exit the Reset vector.
Step 2: Initialize TBLPAG, the read pointer (W6) and the write pointer (W7) for TBLRD instruction.
Step 3: Read the Configuration register and write it to the VISI register (located at 0x784) and clock out the
Step 4: Repeat step 3 twelve times to read all the Configuration registers.
Step 5: Reset device internal PC.
Command
(Binary)
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0001
0000
0000
Reading Configuration Memory
VISI register using the REGOUT command.
SERIAL INSTRUCTION EXECUTION FOR READING ALL CONFIGURATION MEMORY
040200
040200
000000
200F80
880190
EB0300
207847
000000
BA0BB6
000000
000000
<VISI>
040200
000000
(Hex)
Data
GOTO
GOTO
NOP
MOV
MOV
CLR
MOV
NOP
TBLRDL [W6++], [W7]
NOP
NOP
Clock out contents of VISI register.
GOTO
NOP
0x200
#0xF8, W0
W0, TBLPAG
W6
#VISI, W7
0x200
0x200
Table 5-9
reading all of the configuration memory. Note that the
TBLPAG register is hard coded to 0xF8 (the upper byte
address of configuration memory) and the read pointer,
W6, is initialized to 0x0000.
Description
shows the ICSP programming details for
DS70152H-page 47

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