SST39VF1601C-70-4C-B3KE-T Microchip Technology, SST39VF1601C-70-4C-B3KE-T Datasheet
SST39VF1601C-70-4C-B3KE-T
Specifications of SST39VF1601C-70-4C-B3KE-T
Available stocks
Related parts for SST39VF1601C-70-4C-B3KE-T
SST39VF1601C-70-4C-B3KE-T Summary of contents
Page 1
... Data retention is rated at greater than 100 years. The SST39VF1601C/1602C devices are suited for applica- tions that require convenient and economical updating of program, configuration, or data memory. For all system applications, they significantly improve performance and © ...
Page 2
... Sector/Block-Erase Operation The Sector- (or Block-) Erase operation allows the system to erase the device on a sector-by-sector (or block-by- block) basis. The SST39VF1601C/1602C offer both Sec- tor-Erase and Block-Erase mode. The sector architecture is based on a uniform sector size of 2 KWord. The Block-Erase mode is based on non-uniform block sizes— ...
Page 3
... When RY/BY# is actively pulled low, it indicates that an Erase or Program operation is in progress. When RY/BY# is high (Ready), the devices may be read or left in standby mode. Data# Polling (DQ When the SST39VF1601C/1602C are in the internal Pro- gram operation, any attempt to read DQ complement of the true data. Once the Program operation is completed, DQ though DQ ...
Page 4
... The SST39VF1602C supports top hardware block protec- ) tion, which protects the top 8 KWord block of the device. 6 The SST39VF1601C supports bottom hardware block pro- tection, which protects the bottom 8KWord block of the device. The Boot Block address ranges are described in Table 2. Program and Erase operations are prevented on the 8 KWord when WP# is low ...
Page 5
... IL IH mand sequence. Common Flash Memory Interface (CFI) The SST39VF1601C/1602C also contain the CFI informa- tion to describe the characteristics of the device. In order to enter the CFI Query mode, the system writes a three- byte sequence, same as product ID entry command with 98H (CFI Query command) to address 555H in the last byte sequence ...
Page 6
... A11 A10 A9 A8 A19 NC WE# RST# NC WP# RY/BY# A18 A17 FIGURE 2: Pin Assignments for 48-Lead TSOP ©2010 Silicon Storage Technology, Inc. 16 Mbit Multi-Purpose Flash Plus SST39VF1601C / SST39VF1602C X-Decoder Address Buffer & Latches Control Logic Standard Pinout 9 10 Top View 11 12 Die ...
Page 7
... Mbit Multi-Purpose Flash Plus SST39VF1601C / SST39VF1602C FIGURE 3: Pin Assignments for 48-Ball TFBGA FIGURE 4: Pin Assignments for 48-Ball WFBGA ©2010 Silicon Storage Technology, Inc. TOP VIEW (balls facing down) SST39VF1601C/1602C 6 A13 A12 A14 A15 A16 NC DQ15 A10 A11 DQ7 DQ14 DQ13 DQ6 ...
Page 8
... RY/BY open drain output 10KΩ - 100KΩ pull-up resistor is required to allow RY/BY# to transition high indicating the device is ready to read Most significant address ©2010 Silicon Storage Technology, Inc. 16 Mbit Multi-Purpose Flash Plus SST39VF1601C / SST39VF1602C -A address lines will select the sector address lines will select the block T4.2 1380 ...
Page 9
... Silicon Storage Technology, Inc. Bottom Boot Block Address SST39VF1601C # Size (KWord F8000H-FFFFFH 33 32 F0000H-F7FFFH 32 32 E8000H-EFFFFH 31 32 E0000H-E7FFFH 30 32 D8000H-DFFFFH 29 32 D0000H-D7FFFH 28 32 C8000H-CFFFFH 27 ...
Page 10
... The device does not remain in Software Product ID Mode if powered down. 8. With A -A =0; SST Manufacturer ID = 00BFH, is read with SST39VF1601C Device ID = 234FH, is read with Most significant address Both Software ID Exit operations are equivalent 10. If users never lock after programming, Sec ID can be programmed over the previously unprogrammed bits (data=1) using the Sec ID mode again (the programmed ‘ ...
Page 11
... Mbit Multi-Purpose Flash Plus SST39VF1601C / SST39VF1602C TABLE 8: CFI Query Identification String Address Data Data 10H 0051H Query Unique ASCII string “QRY” 11H 0052H 12H 0059H 13H 0002H Primary OEM command set 14H 0000H 15H 0000H Address for Primary Extended Table ...
Page 12
... Erase Block Region 3 Information 36H 0000H 37H 0080H 38H 0000H 39H 001EH Erase Block Region 4 Information 3AH 0000H 3BH 0000H 3CH 0001H ©2010 Silicon Storage Technology, Inc. 16 Mbit Multi-Purpose Flash Plus SST39VF1601C / SST39VF1602C N 21 Bytes (15H = 21 MByte) N (00H = not supported) 12 T10.0 1380 S71380-04-000 05/10 ...
Page 13
... Mbit Multi-Purpose Flash Plus SST39VF1601C / SST39VF1602C ELECTRICAL SPECIFICATIONS Absolute Maximum Stress Ratings (Applied conditions greater than those listed under “Absolute Maximum Stress Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these conditions or conditions greater than those defined in the operational sections of this data sheet is not implied. Exposure to absolute maximum stress rating conditions may affect device reliability.) Temperature Under Bias . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55° ...
Page 14
... This parameter is measured only for initial qualification and after a design or process change that could affect this parameter endurance rating is qualified as a 10,000 cycle minimum for the whole device. A sector- or block-level rating would result in a higher END minimum specification. ©2010 Silicon Storage Technology, Inc. 16 Mbit Multi-Purpose Flash Plus SST39VF1601C / SST39VF1602C 1 = 2.7-3.6V DD Limits Min Max ...
Page 15
... Mbit Multi-Purpose Flash Plus SST39VF1601C / SST39VF1602C AC CHARACTERISTICS TABLE 15: Read Cycle Timing Parameters V Symbol Parameter T Read Cycle Time RC T Chip Enable Access Time CE T Address Access Time AA T Output Enable Access Time CE# Low to Active Output CLZ 1 T OE# Low to Active Output OLZ 1 T CE# High to High-Z Output ...
Page 16
... FIGURE 6: Read Cycle Timing Diagram 555 2AA ADDRESSES WE OE# CE# RY/BY# DQ XXAA 15-0 Note: WP# must be held in proper logic state (V X can FIGURE 7: WE# Controlled Program Cycle Timing Diagram ©2010 Silicon Storage Technology, Inc. 16 Mbit Multi-Purpose Flash Plus SST39VF1601C / SST39VF1602C OLZ T CLZ DATA VALID 555 ADDR T WPH ...
Page 17
... Mbit Multi-Purpose Flash Plus SST39VF1601C / SST39VF1602C 555 2AA ADDRESSES WE# T CPH T AS OE# CE# RY/BY# DQ XXAA 15-0 Note: WP# must be held in proper logic state (V X can FIGURE 8: CE# Controlled Program Cycle Timing Diagram ADDRESS A 19-0 CE# OE# WE# RY/BY DATA FIGURE 9: Data# Polling Timing Diagram © ...
Page 18
... Note: This device also supports CE# controlled Chip-Erase operation. The WE# and CE# signals are interchange- able as long as minimum timings are met. (See Table 16). WP# must be held in proper logic state (V X can FIGURE 11: WE# Controlled Chip-Erase Timing Diagram ©2010 Silicon Storage Technology, Inc. 16 Mbit Multi-Purpose Flash Plus SST39VF1601C / SST39VF1602C OEH SIX-BYTE CODE FOR CHIP-ERASE 555 ...
Page 19
... Mbit Multi-Purpose Flash Plus SST39VF1601C / SST39VF1602C SIX-BYTE CODE FOR BLOCK-ERASE ADDRESSES 555 2AA CE# OE WE# RY/BY# DQ 15-0 XXAA XX55 Note: This device also supports CE# controlled Block-Erase operation. The WE# and CE# signals are interchange- able as long as minimum timings are met. (See Table 16 Block Address ...
Page 20
... Block Address X WP# must be held in proper logic state (V X can but no other value FIGURE 13: WE# Controlled Sector-Erase Timing Diagram ©2010 Silicon Storage Technology, Inc. 16 Mbit Multi-Purpose Flash Plus SST39VF1601C / SST39VF1602C 555 555 2AA SA X XX55 XX80 XXAA XX50 1µs prior to and 1µs after the command sequence. ...
Page 21
... Mbit Multi-Purpose Flash Plus SST39VF1601C / SST39VF1602C Three-Byte Sequence for Software ID Entry ADDRESS 555 2AA CE# OE WE# DQ XXAA XX55 15-0 SW0 SW1 Note: Device ID = 234BH for 39VF1601C and 234AH for 39VF1602C WP# must be held in proper logic state (V X can but no other value IL IH ...
Page 22
... WHP SW1 SW2 µs prior to and 1 µs after the command sequence but no other value IH 555 T IDA T WPH T AA XX55 XX88 SW1 SW2 µs prior to and 1 µs after the command sequence but no other value SST39VF1601C / SST39VF1602C 1380 F13.0 1380 F20.0 S71380-04-000 05/10 ...
Page 23
... Mbit Multi-Purpose Flash Plus SST39VF1601C / SST39VF1602C RY/BY RST# CE#/OE# FIGURE 18: RST# Timing Diagram (When no internal operation is in progress) RY/BY# RST# CE# OE# FIGURE 19: RST# Timing Diagram (During Program or Erase operation) V IHT INPUT V ILT AC test inputs are driven at V (0.9 V IHT for inputs and outputs are V (0 ...
Page 24
... Data Sheet TO DUT FIGURE 21: A Test Load Example ©2010 Silicon Storage Technology, Inc. 16 Mbit Multi-Purpose Flash Plus SST39VF1601C / SST39VF1602C TO TESTER C L 1380 F15.0 24 S71380-04-000 05/10 ...
Page 25
... Mbit Multi-Purpose Flash Plus SST39VF1601C / SST39VF1602C FIGURE 22: Word-Program Algorithm ©2010 Silicon Storage Technology, Inc. Start Load data: XXAAH Address: 555H Load data: XX55H Address: 2AAH Load data: XXA0H Address: 555H Load Word Address/Word Data Wait for end of Program ( Data# Polling bit, or Toggle bit ...
Page 26
... Data Sheet Internal Timer Program/Erase Initiated Wait SCE Program/Erase Completed No FIGURE 23: Wait Options ©2010 Silicon Storage Technology, Inc. 16 Mbit Multi-Purpose Flash Plus SST39VF1601C / SST39VF1602C Toggle Bit Data# Polling Program/Erase Program/Erase Initiated Read word Read same No word Does DQ 6 Program/Erase match? Yes ...
Page 27
... Mbit Multi-Purpose Flash Plus SST39VF1601C / SST39VF1602C CFI Query Entry Command Sequence Load data: XXAAH Load data: XX98H Address: 555H Address: 55H Load data: XX55H Wait T IDA Address: 2AAH Load data: XX98H Read CFI data Address: 55H Wait T IDA Read CFI data FIGURE 24: Software ID/CFI Entry Command Flowcharts © ...
Page 28
... Data Sheet FIGURE 25: Software ID/CFI Exit Command Flowcharts ©2010 Silicon Storage Technology, Inc. 16 Mbit Multi-Purpose Flash Plus SST39VF1601C / SST39VF1602C Software ID Exit/CFI Exit/Sec ID Exit Command Sequence Load data: XXAAH Load data: XXF0H Address: 555H Address: XXH Load data: XX55H Wait T IDA Address: 2AAH ...
Page 29
... Mbit Multi-Purpose Flash Plus SST39VF1601C / SST39VF1602C Chip-Erase Command Sequence Load data: XXAAH Address: 555H Load data: XX55H Address: 2AAH Load data: XX80H Address: 555H Load data: XXAAH Address: 555H Load data: XX55H Address: 2AAH Load data: XX10H Address: 555H Wait T SCE ...
Page 30
... Data Sheet PRODUCT ORDERING INFORMATION SST 39 VF 1602 XXXXX - XX Valid Combinations for SST39VF1601C SST39VF1601C-70-4C-EKE SST39VF1601C-70-4C-B3KE SST39VF1601C-70-4I-EKE SST39VF1601C-70-4I-B3KE Valid Combinations for SST39VF1602C SST39VF1602C-70-4C-EKE SST39VF1602C-70-4C-B3KE SST39VF1602C-70-4I-EKE SST39VF1602C-70-4I-B3KE Note: Valid combinations are those products in mass production or will be in mass production. Consult your SST sales representative to confirm availability of valid combinations and to determine availability of new combinations. © ...
Page 31
... Mbit Multi-Purpose Flash Plus SST39VF1601C / SST39VF1602C PACKAGING DIAGRAMS Pin # 1 Identifier 0.70 0.50 Note: 1. Complies with JEDEC publication 95 MO-142 DD dimensions, although some dimensions may be more stringent. 2. All linear dimensions are in millimeters (max/min). 3. Coplanarity: 0 Maximum allowable mold flash is 0. the package ends, and 0.25 mm between leads. ...
Page 32
... Coplanarity: 0. Ball opening size is 0.29 mm (± 0.05 mm) FIGURE 29: 48-ball Very, Very Thin-profile, Fine-pitch Ball Grid Array (WFBGA) 6mm x 8mm SST Package Code: MAQ ©2010 Silicon Storage Technology, Inc. 16 Mbit Multi-Purpose Flash Plus SST39VF1601C / SST39VF1602C BOTTOM VIEW 4.00 6.00 ± 0.20 0. 1.10 ± 0.10 0.12 0.35 ± ...
Page 33
... Mbit Multi-Purpose Flash Plus SST39VF1601C / SST39VF1602C TABLE 17: Revision History Number 00 • Initial release 01 • Corrected typo in Hardware Block Protection on page 4. • Corrected typo in table title, Table 5 page 8 02 • Changed 1V per 100 µ per 100 ms in Power Up Specifications on page 12 03 • ...