USB3320C-EZK Standard Microsystems (SMSC), USB3320C-EZK Datasheet - Page 45

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USB3320C-EZK

Manufacturer Part Number
USB3320C-EZK
Description
USB PHY
Manufacturer
Standard Microsystems (SMSC)
Datasheet

Specifications of USB3320C-EZK

Lead Free Status / RoHS Status
Compliant

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Highly Integrated Full Featured Hi-Speed USB 2.0 ULPI Transceiver
Datasheet
SMSC USB3320
6.2.1
COMMAND NAME
Register Read
Register Write
Transmit
Idle
ULPI Register
DATA[7:0]
ULPI Register Write
A ULPI register write operation is given in
DATA[7:6] = 10b is driven by the Link at T0. The register address is encoded into DATA[5:0] of the
TXD CMD byte.
To write a register, the Link will wait until DIR is low, and at T0, drive the TXD CMD on the data bus.
At T2 the transceiver will drive NXT high. On the next rising clock edge, T3, the Link will write the
CLK
STP
NXT
DIR
BITS[7:6]
Idle
CMD
00b
01b
10b
11b
Figure 6.3 ULPI Register Write in Synchronous Mode
T0
Table 6.2 ULPI TXD CMD Byte Encoding
CMD BITS[5:0]
XXXXXXb
XXXXXXb
00XXXXb
T1
000000b
000000b
101111b
101111b
(reg write)
TXD CMD
DATASHEET
Reg Data [n-1]
T2
45
Figure
COMMAND DESCRIPTION
ULPI Idle
USB Transmit Packet with No Packet Identifier
(NOPID)
USB Transmit Packet Identifier (PID) where DATA[3:0]
is equal to the 4-bit PID. P
MSB.
Immediate Register Write Command where:
DATA[5:0] = 6-bit register address
Extended Register Write Command where the 8-bit
register address is available on the next cycle.
Immediate Register Read Command where:
DATA[5:0] = 6-bit register address
Extended Register Read Command where the 8-bit
register address is available on the next cycle.
T3
6.3. The TXD command with a register write
Reg Data[n]
T4
Idle
3
P
T5
2
P
1
Reg Data [n]
P
0
Revision 1.0 (07-14-09)
where P
T6
3
is the

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