MF6CWM-100 National Semiconductor, MF6CWM-100 Datasheet - Page 10

MF6CWM-100

Manufacturer Part Number
MF6CWM-100
Description
Manufacturer
National Semiconductor
Datasheet

Specifications of MF6CWM-100

Architecture
Switched Capacitor
Dual Supply Voltage (typ)
±3/±5V
Power Supply Requirement
Single/Dual
Single Supply Voltage (min)
5V
Dual Supply Voltage (min)
±2.5V
Operating Temperature (min)
0C
Operating Temperature (max)
70C
Operating Temperature Classification
Commercial
Package Type
SOIC W
Filter Type
Low Pass Filter
Lead Free Status / RoHS Status
Not Compliant

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www.national.com
1.0 MF6 Application Hints
The MF6 is comprised of a non-inverting unity gain lowpass
sixth order Butterworth switched capacitor filter section and
two undedicated CMOS Op-Amps. The switched capacitor
topology makes the cutoff frequency (where the gain drops
3.01 dB below the DC gain) a direct ratio (100:1 or 50:1) of
the clock frequency supplied to the lowpass filter. Internal in-
tegrator time constants set the filter’s cutoff frequency. The
resistive element of these integrators is actually a capacitor
which is “switched” at the clock frequency (for a detailed dis-
cussion see Input Impedance Section). Varying the clock fre-
quency changes the value of this resistive element and thus
the time constant of the integrators. The clock to cutoff fre-
quency ratio (f
CLK
/f
c
) is set by the ratio of the input and feed-
FIGURE 1. Schmitt Trigger R/C Oscillator
10
back capacitors in the integrators. The higher the clock to
cutoff frequency ratio (or the sampling rate) the closer this
approximation is to the theoretical Butterworth response.
The MF6 is available in f
100:1 (MF6-100).
1.1 CLOCK INPUTS
The MF6 has a Schmitt-trigger inverting buffer which can be
used to construct a simple R/C oscillator. The oscillator’s fre-
quency is dependent on the buffer’s threshold levels as well
as on the resistor/capacitor tolerance (see Figure 1 ).
DS005065-12
CLK
/f
c
ratios of 50:1 (MF6-50) or

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