LTC3770EUH#TR Linear Technology, LTC3770EUH#TR Datasheet - Page 20

LTC3770EUH#TR

Manufacturer Part Number
LTC3770EUH#TR
Description
Manufacturer
Linear Technology
Datasheet

Specifications of LTC3770EUH#TR

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APPLICATIONS INFORMATION
LTC3770
If you make a change and the input current decreases, then
the effi ciency has increased. If there is no change in input
current, then there is no change in effi ciency.
Checking Transient Response
The regulator loop response can be checked by looking
at the load transient response. Switching regulators
take several cycles to respond to a step in load current.
When a load step occurs, V
amount equal to ΔI
series resistance of C
discharge C
by the regulator to return V
During this recovery time, V
overshoot or ringing that would indicate a stability problem.
The I
provide adequate compensation for most applications. For
a detailed explanation of switching control loop theory see
Application Note 76.
Design Example
As a design example, take a supply with the following
specifi cations: V
2.5V ±5%, I
the timing resistor with V
and choose the inductor for about 40% ripple current at
the maximum V
Selecting a standard value of 1.8μH results in a maximum
ripple current of:
Next, choose the synchronous MOSFET switch. Choosing
a Si4874 (R
θ
20
JA
V
R
L
Δ
= 40°C/W) yields a nominal sense voltage of:
SNS(NOM)
ON
I
=
TH
L
(
=
450
pin external components shown in Figure 12 will
=
(
450
3 2 5
(
kHz
OUT
OUT(MAX)
DS(ON)
.
= (10A)(1.3)(0.0083Ω) = 108mV
kHz
2 5
2 5
)( )(
V
IN
generating a feedback error signal used
.
.
IN
)(
0 4 10
)(
:
V
LOAD
V
.
450
= 5V to 28V (15V nominal), V
1 8
2 5
= 0.0083Ω (NOM) 0.010Ω (MAX),
OUT
.
.
= 10A, f = 450kHz. First, calculate
μ
kHz
V
(ESR), where ESR is the effective
H
. ΔI
ON
A
)
)(
)
OUT
LOAD
OUT
1
= V
10
1
OUT
pF
2 5
immediately shifts by an
to its steady-state value.
OUT
28
also begins to charge or
2 5
.
28
)
can be monitored for
.
V
V
:
=
V
V
⎟ =
74
⎟ =
2 8
k
1 3
.
Ω
. μ μ H
A
OUT
=
Tying V
for a nominal value of 110mV with current limit occurring
at 146mV. To check if the current limit is acceptable,
assume a junction temperature of about 80°C above a
70°C ambient with ρ
and double check the assumed T
Because the top MOSFET is on for such a short time, an
Si4884 R
40°C/W will be suffi cient. Checking its power dissipation
at current limit with ρ
The junction temperature will be signifi cantly less at
nominal current, but this analysis shows that careful at-
tention to heat sinking on the board will be necessary in
this circuit.
C
The output capacitors are chosen for a low ESR of 0.013Ω
to minimize output voltage changes due to inductor ripple
current and load steps. The ripple voltage will be only:
However, a 0A to 10A load step will cause an output
change of up to:
An optional 22μF ceramic output capacitor is included
to minimize the effect of ESL in the output ripple. The
complete circuit is shown in Figure 12.
IN
T
T
ΔV
ΔV
I
P
P
LIMIT
is chosen for an RMS current rating of about 3A at 85°C.
J
J
BOT
TOP
OUT(STEP)
OUT(RIPPLE)
= 70°C + (1.65W)(40°C/W) = 136°C
= 70°C + (0.62W)(40°C/W) = 95°C
RNG
=
=
( )(
=
1 7 28
DS(ON)(MAX)
2 5
0 25
28
28
.
to 1.1V will set the current sense voltage range
( )
.
.
1 5 0 010
.
V
V
V
28
= ΔI
146
W
– .
(
(
11
=ΔI
V
= (2.8A) (0.013Ω) = 36mV
2 5
V
+
LOAD
.
mV
A
)
0 37
2 2
L(MAX)
150°C
) ( )
V
.
100°C
2
(
= 0.0165Ω, C
11
( ) ( )
(ESR) = (10A) (0.013Ω) = 130mV
Ω
11
1 4 0 0165
W
A
)
.
A
= 1.5:
)(
+
(ESR)
= 1.4:
=
(
2
100
2
1
0 62
.
1 5 0 010
(
.
2 8
.
pF
J
.
W
in the MOSFET:
(
A
)(
RSS
)
Ω
.
250
=
)
11
+
= 100pF, θ
kHz
Ω
A
)
=
)
1 65
.
W
JA
3770fc
=

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