AD9854ASQ Analog Devices Inc, AD9854ASQ Datasheet - Page 42

• Manufacturer Part Number: AD9854ASQ
• Manufacturer: Analog Devices Inc

Specifications of AD9854ASQ

• Lead Free Status / RoHS Status: Not Compliant

AD9854
EVALUATION BOARD
An evaluation board package is available for AD9854 DDS
devices. This package consists of a PCB, software, and
documentation to facilitate bench analysis of the device’s
performance. To ensure optimum dynamic performance from
the device, users should familiarize themselves with the operation
and performance capabilities of the AD9854 with the evaluation
board and use the evaluation board as a PCB reference design.
EVALUATION BOARD INSTRUCTIONS
The AD9852/AD9854 Revision E evaluation board includes
either an AD9852ASQ or AD9854ASQ IC.
The ASQ package permits 300 MHz operation by virtue of its
thermally enhanced design. This package has a bottom-side
heat slug that must be soldered to the ground plane of the PCB
directly beneath the IC. In this manner, the evaluation board
PCB ground plane layer extracts heat from the AD9852/
AD9854 IC package. If device operation is limited to 200 MHz
and below, the AST package without a heat slug can be used in
customer installations over the full temperature range. The AST
package is less expensive than the ASQ package, and those costs
are reflected in the price of the IC.
Evaluation boards for both the AD9852 and AD9854 are
identical except for the installed IC.
To assist in proper placement of the pin header shorting-
jumpers, the instructions refer to direction (left, right, top,
bottom) as well as header pins to be shorted. Pin 1 for each
3-pin header has been marked on the PCB corresponding with
the schematic diagram. When following these instructions,
position the PCB so that the PCB text can be read from left to
right. The board is shipped with the pin headers configuring the
board as follows:
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GENERAL OPERATING INSTRUCTIONS
Load the CD software onto your PC’s hard disk. The current
software (Version 1.72) supports Windows® 95, Windows 98,
Windows 2000, Windows NT®, and Windows XP.
Connect a printer cable from the PC to the AD9854 evaluation
board printer port connector labeled J11.
REFCLK for the AD9852/AD9854 is configured as
differential. The differential clock signals are provided by
the MC100LVEL16D differential receiver.
The input clock for the MC100LVEL16D is single-ended
via J25. This signal may be 3.3 V CMOS or a 2 V p-p sine
wave capable of driving 50 Ω (R13).
Both DAC outputs from the AD9852/AD9854 are routed
through the two 120 MHz elliptical LP filters and their
outputs connected to J7 (Q or control DAC) and J6
(I or cosine DAC).
The board is set up for software control via the printer port
connector.
The DAC’s output currents are configured for 10 mA.
Rev. D | Page 42 of 52
Hardware Preparation
Use the schematic in conjunction with these instructions to
become acquainted with the electrical functioning of the
evaluation board.
Attach power wires to the connector labeled TB1 using the
screw-down terminals. This connector is plastic and press-fits
over a 4-pin header soldered to the board. Table 11 shows
connections to each pin.
Table 11. Power Requirements for DUT Pins
AVDD 3.3 V
For all DUT
analog pins
1
Attach REFCLK to the clock input, J25.
Clock Input, J25
This is a single-ended input that is routed to the MC100LVEL16D
for conversion to differential PECL output. This is accom-plished
by attaching a 2 V p-p clock or sine wave source to J25. Note that
this is a 50 Ω impedance point set by R13. The input signal is ac-
coupled and then biased to the center-switching threshold of the
MC100LVEL16D. To engage the differential clocking mode of the
AD9854, Pin 2 and Pin 3 of W3 (the bottom two pins) must be
connected with a shorting jumper.
The signal arriving at the AD9854 is called the reference clock.
When engaging the on-chip PLL clock multiplier, this signal is
the reference clock for the PLL and the multiplied PLL output
becomes the system clock. If the PLL clock multiplier is to be
bypassed, the reference clock supplied by the user directly
operates the AD9854 and is therefore the system clock.
Three-State Control
Switch Headers W9, W11, W12, W13, W14, and W15 must be
shorted to allow the provided software to control the AD9854
evaluation board via the Printer Port Connector J11.
Programming
If programming of the AD9854 is not to be provided by the
user’s PC and Analog Devices software, Headers W9, W11,
W12, W13, W14, and W15 should be opened (shorting jumpers
removed). This effectively detaches the PC interface and allows
the 40-pin headers, J10 and J1, to assume control without bus
contention. Input signals on J10 and J1 going to the AD9854
should be 3.3 V CMOS logic levels.
Low-Pass Filter Testing
The purpose of 2-pin headers W7 and W10 (associated with J4
and J5) is to allow the two 50 Ω, 120 MHz filters to be tested
during PCB assembly without interference from other circuitry
attached to the filter inputs. Typically, a shorting jumper is
attached to each header to allow the DAC signals to be routed
to the filters. If the user wishes to test the filters, the shorting
DUT = device under test.
DVDD 3.3 V
For all DUT
digital pins
VCC 3.3 V
For all other
devices
1
Ground
For all
devices