AD9854ASQ Analog Devices Inc, AD9854ASQ Datasheet - Page 7

• Manufacturer Part Number: AD9854ASQ
• Manufacturer: Analog Devices Inc

Specifications of AD9854ASQ

• Lead Free Status / RoHS Status: Not Compliant

Parameter
PARALLEL I/O TIMING CHARACTERISTICS
SERIAL I/O TIMING CHARACTERISTICS
CMOS LOGIC INPUTS
POWER SUPPLY
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
The reference clock inputs are configured to accept a 1 V p-p (typical) dc offset square or sine wave centered at one-half the applied V
An internal 400 mV p-p differential voltage swing equates to 200 mV p-p applied to both REFCLK input pins.
The I and Q gain imbalance is digitally adjustable to less than 0.01 dB.
Pipeline delays of each individual block are fixed; however, if the eight top MSBs of a tuning word are 0s, the delay appears longer. This is due to insufficient phase
accumulation per a system clock period to produce enough LSB amplitude to the DAC.
If a feature such as the inverse sinc, which has 16 pipeline delays, can be bypassed, the total delay is reduced by that amount.
The I/O UD CLK transfers data from the I/O port buffers to the programming registers. This transfer is measured in system clocks.
Change in duty cycle from 1 MHz to 100 MHz with 1 V p-p sine wave input and 0.5 V threshold.
Represents the comparator’s inherent cycle-to-cycle jitter contribution. The input signal is a 1 V, 40 MHz square wave, and the measurement device is a Wavecrest DTS-2075.
Comparator input originates from the analog output section via the external 7-pole elliptic LPF. Single-ended input, 0.5 V p-p. Comparator output terminated in 50 Ω.
Avoid overdriving digital inputs. (Refer to the equivalent circuits in Figure 3.)
If all device functions are enabled, it is not recommended for simultaneous operation at the maximum ambient temperature of 85°C and at the maximum internal
All functions engaged.
All functions except inverse sinc engaged.
All functions except inverse sinc and digital multipliers engaged.
In most cases, disabling the inverse sinc filter can resolve exceeding the maximum die temperature. The inverse sinc filter consumes approximately 30% of the
total power.
clock frequency of 200 MHz for the 80-lead LQFP, or 300 MHz for the thermally enhanced 80-lead LQFP. This configuration can cause the maximum die junction
temperature of 150°C to be exceeded. Refer to the Power Dissipation and Thermal Considerations section for derating and thermal management information.
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
Logic 1 Voltage
Logic 0 Voltage
Logic 1 Current
Logic 0 Current
Input Capacitance
+V
+V
+V
P
P
P
P
ASU
ADHW
DSU
DHD
WRLOW
WRHIGH
WR
ADV
ADHR
RDLOV
RDHOZ
PRE
SCLK
DSU
SCLKPWH
SCLKPWL
DHLD
DV
DISS
DISS
DISS
DISS
S
S
S
(Data Valid Time)
(Minimum Write Time)
(CS Setup Time)
Current
Current
Current
11,
11,
14
(Address Setup Time to WR Signal Active)
(Data Setup Time to WR Signal Inactive)
(Serial Data Setup Time)
(Address to Data Valid Time)
(Data Hold Time to WR Signal Inactive)
Power-Down Mode
(Period of Serial Data Clock)
(Serial Data Hold Time)
(Address Hold Time to RD Signal Inactive)
(Address Hold Time to WR Signal Inactive)
(RD Low to Output Valid)
(RD High to Data Three-State)
12 15
13 15
(WR Signal Minimum Low Time)
(WR Signal Minimum High Time)
(Serial Data Clock Pulse Width Low)
,
,
(Serial Data Clock Pulse Width High)
11,
11,
14
11, 15
12 15
13 15
,
,
10
Temp
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
25°C
Rev. D | Page 7 of 52
Test
Level
IV
IV
IV
IV
V
I
I
IV
IV
V
I
I
I
I
I
I
I
IV
IV
IV
IV
IV
IV
V
IV
IV
IV
IV
IV
IV
Min
8.0
0
3.0
2.5
7
10.5
15
5
30
100
30
40
40
0
2.2
AD9854ASQ
Typ
7.5
1.6
0
1.8
30
3
1050
710
600
3.475
2.345
1.975
1
Max
15
15
10
0.8
±5
±5
1210
816
685
4.190
2.825
2.375
50
Min
8.0
0
3.0
0
2.5
7
10.5
15
5
30
100
30
40
40
0
2.2
AD9854AST
Typ
7.5
1.6
1.8
30
3
755
515
435
2.490
1.700
1.435
1
DD
or a 3 V TTL-level pulse input.
Max
15
15
10
0.8
±12
±12
865
585
495
3.000
2.025
1.715
50
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
V
V
μA
μA
pF
mA
mA
mA
W
W
W
mW
AD9854