LTC4210-4IS6#PBF Linear Technology, LTC4210-4IS6#PBF Datasheet - Page 14

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LTC4210-4IS6#PBF

Manufacturer Part Number
LTC4210-4IS6#PBF
Description
Manufacturer
Linear Technology
Datasheet

Specifications of LTC4210-4IS6#PBF

Linear Misc Type
Positive Low Voltage
Package Type
TSOT-23
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
7V
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Product Height (mm)
0.9mm
Product Length (mm)
2.9mm
Mounting
Surface Mount
Pin Count
6
Lead Free Status / RoHS Status
Compliant
APPLICATIO S I FOR ATIO
LTC4210-3/LTC4210-4
Table 1. t
Power-Off Cycle
The system can be reset by toggling the ON pin low for
more than 30µs as shown at time point 7 of Figure 3. The
GATE pin is pulled to ground. The TIMER capacitor is also
discharged to ground. C
Alternatively, the TIMER pin can be externally driven above
the COMP2 threshold to turn off the GATE pin.
POWER MOSFET SELECTION
Power MOSFETs can be classified by R
drive ratings of 10V, 4.5V, 2.5V and 1.8V. Use the typical
curves ∆VGATE vs Supply Voltage and ∆VGATE vs Tem-
perature to determine whether the gate drive voltage is
adequate for the selected MOSFET at the operating volt-
age.
In addition, the selected MOSFET should fulfill two V
criteria:
1. Positive V
2. Negative V
14
C
LTC4210-4 maximum ∆V
voltage. The gate of the MOSFET can discharge faster
than V
C
TIMER
LOAD
0.033
0.047
0.068
0.082
0.22
0.33
0.47
0.68
0.82
0.1
2.2
3.3
1
(µF)
INITIAL
OUT
.
when shutting down the MOSFET with a large
GS
, t
GS
CBDELAY
t
INITIAL
absolute maximum rating > LTC4210-3/
128.3
185.6
223.8
272.9
600.5
900.7
absolute maximum rating > supply
12.8
18.6
22.4
27.3
60.0
90.1
9.0
U
(ms)
, t
LOAD
COOLOFF
U
GATE
t
discharges through the load.
CBDELAY
vs C
10.2
14.7
17.8
21.7
47.7
71.5
0.7
1.5
1.8
2.2
4.8
7.2
, and
1
TIMER
W
(ms)
DSON
t
COOLOFF
at V
U
181.5
258.5
1210
1815
18.2
25.9
37.4
45.1
121
374
451
550
55
GS
(ms)
gate
GS
If one of the conditions cannot be met, an external Zener
clamp shown on Figure 10a or Figure 10b can be used. The
selection of R
package dissipation when discharging V
clamp.
In addition to the MOSFET gate drive rating and V
absolute maximum rating, other criteria such as V
I
operating area should also be carefully reviewed. V
should exceed the maximum supply voltage inclusive of
spikes and ringing. I
current limit, I
which together with V
At 2.7V supply voltage, the total of V
3.7% V
The maximum power dissipated in the MOSFET is
I
mum power dissipation, P
Given power dissipation, the MOSFET junction tempera-
ture, T
(T
The operating T
cation.
Next review the short-circuit condition under maximum
supply V
I
t
MOSFET. The operation during output short-circuit condi-
tions must be well within the manufacturer’s recom-
mended safe operating region with sufficient margin. To
ensure a reliable design, fault tests should be evaluated in
the laboratory.
V
Unlike most circuits, Hot Swap controllers typically are
not allowed the good engineering practice of supply
bypass capacitors, since controlling the surge current to
bypass capacitors at plug-in is the primary motivation for
the Hot Swap controller. Although wire harness, back-
plane and PCB trace inductances are usually small, these
can create spikes when currents are suddenly drawn, cut-
off or limited. The transient associated with the GATE turn
D(MAX)
LIMIT
LIMIT(MAX)
CBDELAY
IN
A
) and the MOSFET package thermal resistance (θ
TRANSIENT PROTECTION
2
J
, R
• R
OUT
can be computed from the operating temperature
IN(MAX)
with the maximum safe operating area of the
DS(ON)
DS(ON)
during the circuit breaker time-out interval of
error.
LIMIT
G
J
should be within the allowed LTC4210
, P
conditions and maximum current limit,
should be less than the T
and this should be less than the maxi-
. R
D
CB
, θ
D(MAX)
DS(ON)
yields an error in the V
JA
, T
determines the MOSFET V
D
should be greater than the
J(MAX)
allowed in that package.
DS
and maximum safe
+ V
OUT
CB
J(MAX)
of 0.1V yields
via the Zener
OUT
voltage.
specifi-
421034fa
BDSS
BDSS
JA
GS
DS
).
,

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