CY7C4231V-25AC Cypress Semiconductor Corp, CY7C4231V-25AC Datasheet - Page 14

• Manufacturer Part Number: CY7C4231V-25AC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C4231V-25AC

• Configuration: Dual
• Density: 18Kb
• Access Time (max): 15ns
• Word Size: 9b
• Organization: 2Kx9
• Sync/async: Synchronous
• Expandable: Yes
• Bus Direction: Uni-Directional
• Package Type: TQFP
• Clock Freq (max): 40MHz
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Supply Current: 20mA
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 32
• Lead Free Status / RoHS Status: Not Compliant

Document #: 38-06010 Rev. *B
Switching Waveforms
Programmable Almost Full Flag Timing
Write Programmable Registers
Notes:
21. If a write is performed on this rising edge of the write clock, there will be Full – (m–1) words of the FIFO when PAF goes LOW.
22. PAF offset = m.
23. 64–m words for CY7C4421V, 256-m words in FIFO for CY7C4201V, 512–m words for CY7C4211V, 1024–m words for CY7C4221V, 2048–m words for
24. t
(if applicable)
WEN2/LD
CY7C4231V, 4096–m words for CY7C4241V, 8192–m words for CY7C4251V.
of RCLK and the rising edge of WCLK is less than t
SKEW2
WEN2
WCLK
WCLK
WEN1
D
REN1,
WEN1
RCLK
REN2
0
PAF
–D
is the minimum time between a rising RCLK edge and a rising WCLK edge for PAF to change during that clock cycle. If the time between the rising edge
8
t
t
CLKH
CLKH
FULL − (M+1) WORDS
(continued)
t
CLK
t
t
ENS
ENS
t
IN FIFO
DS
PAE OFFSET
t
t
ENS
ENS
LSB
SKEW2
t
t
ENH
ENH
t
t
CLKL
CLKL
, then PAF may not change state until the next WCLK.
t
ENH
t
DH
Note 21
[22]
PAE OFFSET
MSB
t
PAF
CY7C4421V/4201V/4211V/4221V
t
ENS
PAF OFFSET
t
SKEW2
FULL − M WORDS
LSB
CY7C4231V/4241V/4251V
IN FIFO
t
ENS
[24]
t
[23]
ENH
PAF OFFSET
MSB
t
PAF
Page 14 of 18
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