CY7C4231-15JXC Cypress Semiconductor Corp, CY7C4231-15JXC Datasheet
CY7C4231-15JXC
Specifications of CY7C4231-15JXC
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CY7C4231-15JXC Summary of contents
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... High-speed, low-power, First-In, First-Out (FIFO) memories — 64 × 9 (CY7C4421) — 256 × 9 (CY7C4201) — 512 × 9 (CY7C4211) — 1K × 9 (CY7C4221) — 2K × 9 (CY7C4231) — 4K × 9 (CY7C4241) — 8K × 9 (CY7C4251) • High-speed 100-MHz operation (10 ns Read/Write cycle time) • Low power (I ...
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... Read operation. Programming When WEN2/LD is held LOW during Reset, this pin is the load (LD) enable for flag offset programming. In this configuration, WEN2/LD can be used to access the four 8-bit offset registers contained in the CY7C42X1 for writing or reading data to these registers. CY7C4231/4241/4251 -25 Unit 40 MHz 15 ns ...
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... Full Offset (LSB) Reg Default Value = 007h (MSB) 000 0000 Figure 1. Offset Register Location and Default Values CY7C4421/4201/4211/4221 CY7C4231/4241/4251 1K × Empty Offset (LSB) Reg. Empty Offset (LSB) Reg. Default Value = 007h Default Value = 007h (MSB Full Offset (LSB) Reg ...
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... Full Offset ( default value). Document #: 38-06016 Rev. *B (256 – m), CY7C4211 (512 – m), CY7C4221 (1K – m), CY7C4231 (2K – m), CY7C4241 (4K – m), and CY7C4251 (8K – m). PAF is set HIGH by the LOW-to-HIGH transition of WCLK when the number of available memory locations is greater than m. Table 1. Writing the Offset Registers ...
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... RCLK, i.e exclusively updated by each rising edge of RCLK. RESET (RS) 9 CY7C42X1 Read Enable 2 (REN2) Used in a Width Expansion Configuration CY7C4421/4201/4211/4221 CY7C4231/4241/4251 RESET (RS) Read CLOCK (RCLK) Read ENABLE 1 (REN1) OUTPUT ENABLE (OE) PROGRAMMABLE (PAE) EMPTY FLAG (EF) #1 CY7C42X1 EF EMPTY FLAG (EF) #2 DATA OUT (Q) 9 42X1– ...
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... Resets device to empty condition. A reset is required before an initial Read or Write operation after power-up. I When OE is LOW, the FIFO’s data outputs drive the bus to which they are connected HIGH, the FIFO’s outputs are in High-Z (high-impedance) state. CY7C4421/4201/4211/4221 CY7C4231/4241/4251 Ambient Temperature ° ° 0 ...
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... MHz 5.0V CC [11, 12] 3.0V R2 GND 680 Equivalent to: THÉ VENIN EQUIVALENT 420 OUTPUT -10 Min. Max. 100 2 10 4.5 4 OHZ CY7C4421/4201/4211/4221 CY7C4231/4241/4251 -15 -25 Min. Max. Min. Max. 2.4 2.4 0.4 0.4 2 –3.0 0.8 –3.0 0.8 –10 +10 –10 +10 –90 –90 –10 +10 – ...
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... SKEW1 RCLK REN1,REN2 Notes: 13. Pulse widths less than minimum values are not allowed. 14. Values guaranteed by design, not currently tested. Document #: 38-06016 Rev. *B -10 Min. Max. 0 [14 [14 CLK t t CLKH CLKL ENS t WFF [15] CY7C4421/4201/4211/4221 CY7C4231/4241/4251 -15 -25 Min. Max. Min. Max ...
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... RSS t RSS t RSF t RSF t RSF , then FF may not change state until the next WCLK rising edge. SKEW1 , then EF may not change state until the next RCLK rising edge. SKEW1 CY7C4421/4201/4211/4221 CY7C4231/4241/4251 t REF VALID DATA t OHZ t RSR t RSR t RSR [19] OE=1 OE=0 Page ...
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... Document #: 38-06016 Rev VALID Write) 1 [20] t FRL t SKEW1 t REF [21 OLZ [20 REF REF t A (maximum When t < minimum specification, t CLK SKEW1 SKEW1 CY7C4421/4201/4211/4221 CY7C4231/4241/4251 DATAWRITE2 t ENH t ENS t ENS t ENH [20] t FRL t t REF SKEW1 DATA Read (maximum) = either 2*t FRL CLK Page SKEW1 ...
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... DS DATA Write t WFF t ENH t A DATA Read t CLKL t t ENS ENH t t Note ENS ENH 23 [22] t PAE t CY7C4421/4201/4211/4221 CY7C4231/4241/4251 NO Write [15] t SKEW1 t t WFF WFF t ENH t ENS t A NEXT DATA Read WORDS Note INFIFO ENS ENS ENH DATA Write t PAE ...
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... If a Write is performed on this rising edge of the Write clock, there will be Full – (m – 1) words of the FIFO when PAF goes LOW. 26. PAF offset = m. 27. 64-m words for CY7C4421, 256 – m words in FIFO for CY7C4201, 512 – m words for CY7C4211, 1024 – m words for CY7C4221, 2048 – m words for CY7C4231, 4096 – m words for CY7C4241, 8192 – m words for CY7C4251. ...
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... Switching Waveforms (continued) Read Programmable Registers t CLK t CLKH RCLK t ENS WEN2/LD t ENS REN1, REN2 Q – Document #: 38-06016 Rev. *B CY7C4421/4201/4211/4221 t CLKL t ENH t A UNKNOWN PAE OFFSET LSB CY7C4231/4241/4251 PAF OFFSET MSB PAF OFFSET PAE OFFSET MSB LSB Page ...
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... A AMBIENT TEMPERATURE 1. 5.0V CC 1.25 1.00 0.75 0. AMBIENT TEMPERATURE ( C) OUTPUT SINK CURRENT vs. OUTPUT VOLTAGE 160 140 120 100 OUTPUT VOLTAGE (V) CY7C4421/4201/4211/4221 CY7C4231/4241/4251 NORMALIZED SUPPLY CURRENT vs. FREQUENCY 3.0V IN 0.90 0.80 0.70 0.60 125 FREQUENCY (MHz) TYPICAL t CHANGE vs. A OUTPUT LOADING 5.0V ...
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... Thin Quad Flatpack J65 32-lead Plastic Leaded Chip Carrier Package Package Name Type A32 32-lead Thin Quad Flatpack J65 32-lead Plastic Leaded Chip Carrier A32 32-lead Thin Quad Flatpack CY7C4231/4241/4251 Operating Range Commercial Commercial Operating Range Commercial Commercial Commercial Industrial Operating Range ...
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... Thin Quad Flatpack A32 32-lead Thin Quad Flatpack J65 32-lead Plastic Leaded Chip Carrier A32 32-lead Thin Quad Flatpack J65 32-lead Plastic Leaded Chip Carrier A32 32-lead Thin Quad Flatpack CY7C4231/4241/4251 Operating Range Commercial Operating Range Commercial Industrial Commercial Commercial Industrial ...
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... The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. CY7C4421/4201/4211/4221 32-Lead Plastic Leaded Chip Carrier J65 CY7C4231/4241/4251 51-85063-B 51-85002-B Page ...
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... Document Title: CY7C4421/4201/4211/4221, CY7C4231/4241/4251 64/256/512/1K/2K/4K/ Synchronous FIFOs Document Number: 38-06016 Issue REV. ECN NO. Date ** 106477 09/10/01 *A 110725 03/20/02 *B 122268 12/26/02 Document #: 38-06016 Rev. *B Orig. of Change Description of Change SZV Change from Spec number: 38-00419 to 38-06016 FSG Change Input Leakage current I RBI Power up requirements added to Maximum Ratings Information ...