MPC2605ZP83 Freescale, MPC2605ZP83 Datasheet - Page 24

• Manufacturer Part Number: MPC2605ZP83
• Manufacturer: Freescale

Specifications of MPC2605ZP83

• Operating Temperature (max): 85C
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Not Compliant

MPC2605/D
READ/WRITE SNOOP HIT (DIRTY L2 LINE)
a cache line that is dirty in the L2, but is not dirty in
the processor's cache. When a snoop hits a dirty line,
the MPC2605 will assert ARTRY through the cycle
following the assertion of AACK. This cycle is called
the ARTRY window. Note that the MPC2605 also
asserts L2 BR at the same time it asserts ARTRY.
Because the snoop could also have hit a dirty line in
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DH0 – DH31,
DL0 – DL31
CPU DBG
L2 CLAIM
Figure 7 is an illustration of a read or write snoop to
A0 – A31
CPU BG
CPU BR
L2 DBG
ARTRY
L2 BR
L2 BG
AACK
DBB
CLK
TS
TA
Figure 7. Read or Write Snoop Hit to Dirty L2 Cache Line and Clean Processor Cache Line
LEGEND
Signal driven to the MPC2605
Signal driven by the MPC2605
High-Z
Integrated Secondary Cache for Microprocessors
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Freescale Semiconductor, Inc.
For More Information On This Product,
That Implement PowerPC Architecture
A
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Go to: www.freescale.com
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the processor's cache, the MPC2605 samples the
processor's BR signal, the cycle following the ARTRY
window. This cycle is called the BR window. If the
processor's BR signal is not asserted, the MPC2605
will start sampling L2 BG, the cycle after the BR
window.
back burst. The earliest that it can handle the first
assertion of TA is two cycles after its assertion of TS.
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Note that the MPC2605 cannot do a 2-1-1-1 copy
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A
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A1
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A2
MOTOROLA
A
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A3
A4
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