CY7C1470V25-250BZC Cypress Semiconductor Corp, CY7C1470V25-250BZC Datasheet - Page 27

• Manufacturer Part Number: CY7C1470V25-250BZC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C1470V25-250BZC

• Density: 72Mb
• Access Time (max): 3ns
• Sync/async: Synchronous
• Architecture: SDR
• Clock Freq (max): 250MHz
• Operating Supply Voltage (typ): 2.5V
• Address Bus: 21b
• Package Type: FBGA
• Operating Temp Range: 0C to 70C
• Number Of Ports: 4
• Supply Current: 450mA
• Operating Supply Voltage (min): 2.375V
• Operating Supply Voltage (max): 2.625V
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 165
• Word Size: 36b
• Number Of Words: 2M
• Lead Free Status / RoHS Status: Not Compliant

Document #: 38-05290 Rev. *I
Document History Page
Document Title: CY7C1470V25/CY7C1472V25/CY7C1474V25 72-Mbit(2M x 36/4M x 18/1M x 72)
Pipelined SRAM with NoBL™ Architecture
Document Number: 38-05290
REV.
*C
*D
*G
*H
*A
*B
*E
*F
**
ECN No.
114677
121519
223721
235012
243572
299511
320197
331513
416221
Issue Date
See ECN
See ECN
See ECN
See ECN
See ECN
See ECN
See ECN
08/06/02
01/27/03
Change
Orig. of
CJM
RYQ
RXU
PKS
NJY
SYT
NJY
PCI
PCI
New data sheet
Updated features for package offering
Removed 300-MHz offering
Changed tCO, tEOV, tCHZ, tEOHZ from 2.4 ns to 2.6 ns (250 MHz), tDOH, tCLZ
from 0.8 ns to 1.0 ns (250 MHz), tDOH, tCLZ from 1.0 ns to 1.3 ns (200 MHz)
Updated ordering information
Changed Advanced Information to Preliminary
Changed timing diagrams
Changed logic block diagrams
Modified Functional Description
Modified “Functional Overview” section
Added boundary scan order for all packages
Included thermal numbers and capacitance values for all packages
Included IDD and ISB values
Removed 250-MHz offering and included 225-MHz speed bin
Changed package outline for 165FBGA package and 209-ball BGA package
Removed 119-BGA package offering
Minor Change: The data sheets do not match on the spec system and
external web
Changed ball C11,D11,E11,F11,G11 from DQPb,DQb,DQb,DQb,DQb to
DQPa,DQa,DQa,DQa,DQa in page 4
Modified capacitance values in page 19
Removed 225-MHz offering and included 250-MHz speed bin
Changed t
Changed Θ
TQFP Package on Page # 19
Added lead-free information for 100-Pin TQFP and 165 FBGA Packages
Added comment of ‘Lead-free BG packages availability’ below the Ordering
Information
Corrected typo in part numbers on page# 9 and 10
Address expansion pins/balls in the pinouts for all packages are modified as per
JEDEC standard
Added Address Expansion pins in the Pin Definitions Table
Added Industrial Operating Range
Modified V
Updated Ordering Information Table
Converted from Preliminary to Final
Changed address of Cypress Semiconductor Corporation on Page# 1 from
“3901 North First Street” to “198 Champion Court”
Changed Three-state to Tri-state
Changed the description of I
on page# 17
Changed the I
to –30 µA and 5 µA
Changed the I
to –5 µA and 30 µA
Changed V
Replaced Package Name column with Package Diagram in the Ordering Infor-
mation table
Updated Ordering Information table
CYC
OL
DDQ
JA
, V
from 16.8 to 24.63 °C/W and Θ
X
X
from 4.4 ns to 4.0 ns for 250-MHz Speed Bin
OH
current values of MODE on page # 17 from –5 µA and 30 µA
current values of ZZ on page # 17 from –30 µA and 5 µA
< V
Test Conditions
DD
to V
DDQ
Description of Change
X
from Input Load Current to Input Leakage Current
< V
DD
on page #17
JC
from 3.3 to 2.28 °C/W for 100
CY7C1470V25
CY7C1472V25
CY7C1474V25
Page 27 of 28
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