FW82801CA S L632 Intel, FW82801CA S L632 Datasheet

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FW82801CA S L632

Manufacturer Part Number
FW82801CA S L632
Description
Manufacturer
Intel
Datasheet

Specifications of FW82801CA S L632

Lead Free Status / RoHS Status
Not Compliant
Intel® E7500 Chipset for Embedded Computing - Overview
http://www.intel.com/design/chipsets/embedded/273686.htm (1 of 4)12/10/2006 8:14:31 PM
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For Embedded Computing
The Intel® E7500 chipset provides a value in high performance
chipset technology. The Intel E7500 chipset supports dual
processor platforms optimized for the
with 512 KB L2 cache
processor
E7500 chipset design delivers maximized system bus,
memory, and I/O bandwidth to enhance performance,
scalability, and end-user productivity.
The Intel E7500 chipset utilizes a modular design and offers
platform implementation flexibility to meet the expanding
needs of dual processor (DP) embedded computing
applications through three core components:
The E7500 Memory Controller Hub (MCH) is the central hub for all data passing through
core system elements such as the single or dual Intel Xeon processors with 512 KB L2 cache
via the system bus interface, the memory via memory interface, and both the 64-bit PCI/PCI-
X and I/O controller hubs via Intel® Hub Interfaces. The Intel E7500 chipset delivers
compelling performance at 3.2 GB/s of bandwidth across the 400 MHz system bus and up to
3.2 GB/s of bandwidth across two high-performance Double Data Rate SDRAM memory
channels. To balance the performance offered by the processor and memory interfaces, the
MCH allows several high-bandwidth I/O configuration options for a total of 3.2 GB/s of I/O
bandwidth. Together, these features deliver balanced, high-throughput system performance.
The 82870P2 64-bit PCI/PCI-X Controller Hub 2 (P64H2) connects to the MCH
Embedded & Flash Memory
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Intel® Xeon® processor
Intel® E7500 Chipset

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FW82801CA S L632 Summary of contents

Page 1

... The E7500 Memory Controller Hub (MCH) is the central hub for all data passing through core system elements such as the single or dual Intel Xeon processors with 512 KB L2 cache via the system bus interface, the memory via memory interface, and both the 64-bit PCI/PCI- X and I/O controller hubs via Intel® ...

Page 2

... PCI 2.2-compliant interfaces. Features that maximize performance and balance the platform: Dual Intel Xeon processors with 512 KB L2 cache or Low Voltage Intel Xeon processors and a 400 MHz system bus provide up to 3.2 GB/s of available bandwidth. Dual DDR-200 memory channels operate in lock-step to provide ...

Page 3

... Intel® E7500 Chipset for Embedded Computing - Overview Product Highlights Supports one or two Intel® Xeon® processors with 512 KB L2 cache or Low Voltage Intel Xeon processors for embedded computing platforms 400 MHz system bus capability The P64H2 provide an Intel® Hub Architecture 2.0 connection to the MCH ...

Page 4

... Intel® E7500 Chipset for Embedded Computing - Overview Product E7500 Memory Controller Hub (MCH) 82801CA Integrated Controller Hub (ICH3-S) 82870P2 64-bit PCI/PCI-X Controller (P64H2) ©2005 Intel Corporation http://www.intel.com/design/chipsets/embedded/273686.htm (4 of 4)12/10/2006 8:14:31 PM Product Code Package RGE7500PL 1005 Flip Chip-Ball Grid Array (FC- ...

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