CY7C63722CXC Cypress Semiconductor Corp, CY7C63722CXC Datasheet - Page 34
CY7C63722CXC
Manufacturer Part Number
CY7C63722CXC
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet
1.CY7C63722CXC.pdf
(53 pages)
Specifications of CY7C63722CXC
Lead Free Status / RoHS Status
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Figure 40. Port 1 Interrupt Polarity Register
(Address 0x07)
Document #: 38-08022 Rev. *D
Read/Write
Bit Name
Reset
GPIO
Pin
Bit #
IRA
1 = Enable
0 = Disable
W
7
0
W
6
0
Port Bit Interrupt
Enable Register
P1 Interrupt Polarity
W
5
0
Port Bit Interrupt
Polarity Register
W
4
0
M
U
X
W
3
0
W
2
0
Figure 41. GPIO Interrupt Diagram
W
1
0
1 = Enable
0 = Disable
W
0
0
(1 input per
OR Gate
GPIO pin)
(Bit 6, Register 0x20)
GPIO Interrupt
Bit [7:0]: P1[7:0] Interrupt Polarity
1 = Rising GPIO edge
0 = Falling GPIO edge
Global
Enable
1
GPIO Interrupt
Flip Flop
D
CLR
Q
Interrupt
Encoder
Priority
CY7C63722C
CY7C63723C
CY7C63743C
Page 34 of 53
Interrupt
IRQout
Vector
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