FDC37M707-MS Standard Microsystems (SMSC), FDC37M707-MS Datasheet - Page 110
FDC37M707-MS
Manufacturer Part Number
FDC37M707-MS
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet
1.FDC37M707-MS.pdf
(194 pages)
Specifications of FDC37M707-MS
Pin Count
100
Lead Free Status / RoHS Status
Compliant
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SERIAL INTERRUPTS
The FDC37M70x will support the serial interrupt
to transmit interrupt information to the host
system. The serial interrupt scheme adheres to
the Serial IRQ Specification for PCI Systems,
Version 6.0.
PCICLK
IRQSER
Drive Source
A) Start Frame timing with source sampled a low pulse on IRQ1
1) Start Frame pulse can be 4-8 clocks wide.
IRQ1
SL
or
H
H=Host Control
SL=Slave Control
START
Host Controller
START FRAME
H
1
S=Sample
R
110
T
R=Recovery
T=Turn-around
Timing Diagrams For IRQSER Cycle
IRQ0 FRAME IRQ1 FRAME
S
None
R
PCICLK = PCI_CLK pin
IRQSER = SER_IRQ pin
T
S
IRQ1
R
T
IRQ2 FRAME
S
None
R
T
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