CY7C63743QXC Cypress Semiconductor Corp, CY7C63743QXC Datasheet - Page 41
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CY7C63743QXC
Manufacturer Part Number
CY7C63743QXC
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet
1.CY7C63743QXC.pdf
(53 pages)
Specifications of CY7C63743QXC
Lead Free Status / RoHS Status
Compliant
Absolute Maximum Ratings
Storage Temperature ................................. –65°C to +150°C
Ambient Temperature with Power Applied...... –0°C to +70°C
Supply Voltage on V
DC Input Voltage .................................. –0.5V to +V
DC Voltage Applied to Outputs in High Z State –0.5V to + V
Maximum Total Sink Output Current into Port 0 and 1 and Pins70 mA
Maximum Total Source Output Current into Port 0 and 1 and Pins30 mA
Maximum On-chip Power Dissipation on any GPIO Pin50 mW
Power Dissipation..................................................... 300 mW
Static Discharge Voltage .......................................... > 2000V
Latch-up Current ................................................... > 200 mA
DC Characteristics
Document #: 38-08022 Rev. *D
V
V
I
I
I
I
V
T
I
I
I
V
t
V
C
V
Notes
CC1
CC2
SB1
SB2
IL
SNK
SRC
VCCS
4. Full functionality is guaranteed in V
5. Bench measurements taken under nominal operating conditions. Spec cannot be guaranteed at final test.
6. Total current cumulative across all Port pins, limited to minimize Power and Ground-Drop noise effects.
7. LVR is automatically disabled during suspend mode.
8. LVR will re-occur whenever V
9. V
10. In suspend mode, V
CC1
CC2
PP
RSNTR
LVR
REG
OHU
REG
is not regulated, and should not be used as a general source of regulated voltage in that case. During receive of USB data, the VREG output drops when D– is
LOW due to internal series resistance of approximately 200Ω at the VREG pin.
REG
specified for regulator enabled, idle conditions (i.e., no USB traffic), with load resistors listed. During USB transmits from the internal SIE, the VREG output
Operating Voltage
Operating Voltage
V
Oscillator Mode
Typical I
V
Oscillator Mode
Typical I
Standby Current – No Wake-up Osc
Standby Current – With Wake-up Osc
Programming Voltage (disabled)
Resonator Start-up Interval
Input Leakage Current
Max I
Max I
Low-Voltage Reset Trip Voltage
V
VREG Regulator Output Voltage
Capacitance on VREG Pin
Static Output High, driven
CC
CC
CC
Low-Voltage and Power-on Reset
Operating Supply Current – Internal
Operating Supply Current – External
Power-on Slew Time
SS
CC
REG
CC
CC1
CC2
GPIO Sink Current
GPIO Source Current
is only valid if R
Relative to V
= 13 mA
= 16 mA
CC
USB Interface
FOSC = 6 MHz; Operating Temperature = 0 to 70°C
drops below V
Parameter
General
CC1
[5]
[5]
range, except USB transmitter specifications and GPIO output currents are guaranteed for V
PU
SS
is connected from D– to VREG pin, and R
..........–0.5V to +7.0V
LVR
. In suspend or with LVR disabled, BOR occurs whenever V
CC
+0.5V
Note 4
Note 4
V
V
V
V
Oscillator off, D– > 2.7V
Oscillator off, D– > 2.7V
V
Any I/O pin
Cumulative across all ports
Cumulative across all ports
V
linear ramp: 0 to 4V
Load = R
External cap not required
R
CC
CC
CC
CC
CC
CC
CC
PD
+0.5V
= 5.5V, no GPIO loading
= 5.0V. T = Room Temperature
= 5.5V, no GPIO loading
= 5.0V. T = Room Temperature
= 5.0V, ceramic resonator
below V
to Gnd
PU
[4]
+R
PD
LVR
Conditions
is connected from D– to ground.
PD
for >100 ns
[9, 10]
[8]
[6]
[6]
[7]
CC
drops below approximately 2.5V.
V
Min.
4.35
–0.4
3.5
3.0
2.8
LVR
CC2
CY7C63722C
CY7C63723C
CY7C63743C
Max.
range.
5.25
256
100
300
5.5
0.4
4.0
3.6
3.6
20
17
25
75
70
30
1
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Unit
mA
mA
mA
mA
μA
μA
μA
ms
pF
μs
V
V
V
V
V
V
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