LPC47M192-NW Standard Microsystems (SMSC), LPC47M192-NW Datasheet - Page 151
LPC47M192-NW
Manufacturer Part Number
LPC47M192-NW
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet
1.LPC47M192-NW.pdf
(228 pages)
Specifications of LPC47M192-NW
Lead Free Status / RoHS Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LPC47M192-NW
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
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Manufacturer:
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SMSC DS – LPC47M192
Force Disk Change
Default = 0x03 on
VCC
Reset and VTR POR
Floppy
Select Shadow
UART1
Control Shadow
UART2 FIFO Control
Shadow
NAME
POR,
Data
FIFO
Rate
PCI
REG OFFSET
(R/W)
(hex)
(R)
(R)
(R)
1E
1F
20
21
DATASHEET
Force Disk Change
Bit[0] Force Disk Change for FDC0
0=Inactive
1=Active
0=Inactive
1=Active
Force Change 0 and 1 can be written to 1 but are not
clearable by software.
Force Change 0 is cleared on nSTEP and nDS0
Force Change 1 is cleared on nSTEP and nDS1
DSKCHG (FDC DIR Register, Bit 7) = (nDS0 AND Force
Change 0) OR (nDS1 AND Force Change 1) OR
nDSKCHG
Setting either of the Force Disk Change bits active ‘1’
forces the FDD nDSKCHG input active when the
appropriate drive has been selected.
Bit[7:2] Reserved
Floppy Data Rate Select Shadow
Bit[0] Data Rate Select 0
Bit[1] Data Rate Select 1
Bit[2] PRECOMP 0
Bit[3] PRECOMP 1
Bit[4] PRECOMP 2
Bit[5] Reserved
Bit[6] Power Down
Bit[7] Soft Reset
UART FIFO Control Shadow 1
Bit[0] FIFO Enable
Bit[1] RCVR FIFO Reset
Bit[2] XMIT FIFO Reset
Bit[3] DMA Mode Select
Bit[5:4] Reserved
Bit[6] RCVR Trigger (LSB)
Bit[7] RCVR Trigger (MSB)
UART FIFO Control Shadow 2
Bit[0] FIFO Enable
Bit[1] RCVR FIFO Reset
Bit[2] XMIT FIFO Reset
Bit[3] DMA Mode Select
Bit[5:4] Reserved
Bit[6] RCVR Trigger (LSB)
Bit[7] RCVR Trigger (MSB)
Bit[1] Force Disk Change for FDC1
Page 151
DESCRIPTION
Rev. 03/30/05
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