CY7C66013-PVC Cypress Semiconductor Corp, CY7C66013-PVC Datasheet - Page 29

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CY7C66013-PVC

Manufacturer Part Number
CY7C66013-PVC
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C66013-PVC

Operating Temperature (max)
70C
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
48
Lead Free Status / RoHS Status
Not Compliant

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Table 17-1. Control Bit Definition for Downstream Ports
The data received on downstream ports can be read through the HUB Ports SE0 Status Register (0x4F) and the Hub Ports Data
Register (0x50). The data read through the Hub Ports Data Register is the differential data only and not dependent on the settings
of the Hub Port Speed Register (0x4A). When the SE0 condition is sensed on a downstream port, the corresponding bits of the
Hub Ports Data Register are undefined. Hub Ports SE0 Status Register and Hub Ports Data Register are cleared upon reset.
The Hub Ports Suspend Register (0x4D) and Hub Ports Resume Status Register (0x4E) indicate the suspend and resume
conditions on downstream ports. If the enable Device Remote Wakeup bit (bit 7) of the Hub Ports Suspend Register (0x4D) is
set, a downstream device will wake up the hub from suspend upon a connect or a disconnect event. A resume bit is set automat-
ically by the hardware when the SIE section of the microcontroller detects a resume condition on a suspended downstream port.
The resume condition is a differential ‘1’ for a low-speed device and a differential ‘0’ for a high-speed device.
17.4
USB status and control is regulated by the USB Status and Control Register located at I/O address 0x1F as shown in Figure 17-9 .
This is a read/write register. All bits in the register are cleared during reset.
The Bus Activity bit is a “sticky” bit that indicates if any non-idle USB event has occurred on the upstream USB port. The user
firmware should check and clear this bit periodically to detect any loss of bus activity. Writing a ‘0’ to the Bus Activity bit clears it
while writing a ‘1’ preserves the current value. In other words, the firmware can clear the Bus Activity bit, but only the SIE can set
it. The 1.024-ms timer interrupt service routine is normally used to check and clear the Bus Activity bit.
mote Wakeup
Device Re-
Reserved
Reserved
Reserved
Endpoint
Control Bits
bit1 bit 0
R/W
Size
0
0
1
1
7
7
7
7
7
USB Upstream Port Status and Control
0
1
0
1
Reserved
Reserved
Reserved
Reserved
Endpoint
Mode
R/W
6
6
6
6
6
Figure 17-8. Hub Ports Resume Status Register 0x4E (read only)
Force Differential ‘1’
Force Differential ‘0’
Figure 17-9. USB Status and Control Register 0x1F (read/write)
Force SE0 state
Figure 17-5. Hub Ports SE0 Status Register 0x4F (read only)
Control Action
Figure 17-7. Hub Ports Suspend Register 0x4D (read/write)
Not Forcing
Reserved
Reserved
Reserved
Reserved
Figure 17-6. Hub Ports Data Register 0x50 (read only)
D+
R
5
5
5
5
5
PRELIMINARY
Reserved
Reserved
Reserved
Reserved
D–
R
4
4
4
4
4
29
Bus Activity
Suspend 4
Resume 4
Port 4
Port 4
R/W
3
3
3
3
3
Suspend 3
Resume 3
Control
Port 3
Port 3
Bit 2
R/W
2
2
2
2
2
Suspend 2
CY7C66011/12/13
CY7C66111/12/13
Resume 2
Control
Port 2
Port 2
Bit 1
R/W
1
1
1
1
1
Suspend 1
Resume 1
Control
Port 1
Port 1
R/W
Bit 0
0
0
0
0
0

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