MCIMX351AJQ5C Freescale, MCIMX351AJQ5C Datasheet - Page 2
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MCIMX351AJQ5C
Manufacturer Part Number
MCIMX351AJQ5C
Description
Manufacturer
Freescale
Datasheet
1.MCIMX351AJQ5C.pdf
(148 pages)
Specifications of MCIMX351AJQ5C
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
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The i.MX35 processor takes advantage of the ARM1136JF-S™ core running at 532 MHz that is boosted
by a multilevel cache system, and features peripheral devices such as an autonomous image processing
unit, a vector floating point (VFP11) co-processor, and a RISC-based DMA controller.
The i.MX35 supports connections to various types of external memories, such as SDRAM, mobile DDR
and DDR2, SLC and MLC NAND Flash, NOR Flash and SRAM. The device can be connected to a variety
of external devices such as high-speed USB2.0 OTG, ATA, MMC/SDIO, and Compact Flash.
1.1
The i.MX35 is designed for automotive infotainment video-enabled applications. It provides low-power
solutions for applications demanding high-performance multimedia and graphics.
The i.MX35 is based on the ARM1136 platform, which has the following features:
To boost multimedia performance, the following hardware accelerators are integrated:
The MCIMX35 provides the following interfaces to external devices (some of these interfaces are muxed
and not available simultaneously):
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A/V connectivity and navigation:
— Includes audio connectivity and telematics features
— Map display and route calculation
— QVGA video decode, WVGA video display
— Sophisticated graphical user interface
ARM1136JF-S processor, version r1p3
16-Kbyte L1 instruction cache
16-Kbyte L1 data cache
128-Kbyte L2 cache, version r0p4
128 Kbytes of internal SRAM
Vector floating point unit (VFP11)
Image processing unit (IPU)
OpenVG 1.1 graphics processing unit (GPU) (not available for the MCIMX351)
2 controller area network (CAN) interfaces
2 SDIO/MMC interfaces, 1 SDIO/CE-ATA interface (CE-ATA is not available for the
MCIMX351)
32-bit mobile DDR, DDR2 (4-bank architecture), and SDRAM (up to 133 MHz)
2 configurable serial peripheral interfaces (CSPI) (up to 52 Mbps each)
Enhanced serial audio interface (ESAI)
2 synchronous serial interfaces (SSI)
Ethernet MAC 10/100 Mbps
1 USB 2.0 host with ULPI interface or internal full-speed PHY. Up to 480 Mbps if external HS
PHY is used.
1 USB 2.0 OTG (up to 480 Mbps) controller with internal high-speed OTG PHY
Features
i.MX35 Applications Processors for Automotive Products, Rev. 9
Freescale Semiconductor
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