MCIMX351AJQ5C Freescale, MCIMX351AJQ5C Datasheet - Page 46
MCIMX351AJQ5C
Manufacturer Part Number
MCIMX351AJQ5C
Description
Manufacturer
Freescale
Datasheet
1.MCIMX351AJQ5C.pdf
(148 pages)
Specifications of MCIMX351AJQ5C
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
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4.9.5.3
Figure 27
mobile DDR or SDR SDRAM.
46
SD1
SD2
SD3
SD4
SD5
SD6
ID
SDCLK
SDCLK
ADDR
SDRAM clock high-level width
SDRAM clock low-level width
SDRAM clock cycle time
CS, RAS, CAS, WE, DQM, CKE setup time
CS, RAS, CAS, WE, DQM, CKE hold time
Address setup time
through
DQM
RAS
CAS
WE
DQ
CS
ESDCTL Electrical Specifications
SD4
SD6
SD4
Figure 36
ROW/BA
Table 33. DDR/SDR SDRAM Read Cycle Timing Parameters
i.MX35 Applications Processors for Automotive Products, Rev. 9
depict the timings pertaining to the ESDCTL module, which interfaces with
SD5
Figure 27. SDRAM Read Cycle Timing Diagram
SD5
Table 33
SD7
SD10
Parameter
SD4
COL/BA
SD4
SD4
through
SD5
SD5
SD5
Table 42
SD8
Note: CKE is high during the read/write cycle.
list the timing parameters.
Data
SD1
SD9
SD3
SD2
Symbol
tCMH
tCMS
tCH
tCK
tAS
tCL
Min.
3.4
3.4
7.0
2.0
1.8
2.0
Freescale Semiconductor
Max.
4.1
4.1
—
—
—
—
Unit
ns
ns
ns
ns
ns
ns
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